Re: [PATCH v2] net/mlx4_core: VF probe fail when HW support 64-bit coherent DMA

Shamir Rabinovitch
2017-01-25T12:42:30Z

On Tue, Jan 24, 2017 at 04:34:34PM -0500, Doug Ledford wrote:
> On Wed, 2017-01-11 at 10:53 +0200, Leon Romanovsky wrote:
> > On Mon, Jan 09, 2017 at 04:38:19AM -0500, Shamir Rabinovitch wrote:
> > >
> > > [1383664.318513] mlx4_core 0006:01:00.1: HCA minimum page size:1
> > > [1383664.318515] mlx4_core 0006:01:00.1: UAR size:4096 != kernel
> > > PAGE_SIZE of
> > > 8192
> > > [1383664.318517] mlx4_core 0006:01:00.1: Failed to obtain slave
> > > caps
> > >
> > > Signed-off-by: Shamir Rabinovitch <shamir.rabinovitch-QHcLZuEGTsvQT0dZR+AlfA@public.gmane.org>
> > >
> > > ---
> >
> > Doug,
> > To be clear, NAK.
> > It is custom kernel with out-of-tree patches and very specific FW.
>
> As you wish.

Just as FYI, the only reason I can't run upstream vanilla kernel on
SPARC T7-2 (where issue is seen) is that there is series of patches that
fix PCI related issues for this HW that is not fully upstream yet.

Once it is upstream, we will be able to see the issue on upstream
vanilla kernel.

Other drivers do work well with 64-bit coherent DMA addresses and the
PCI fixes so I still suspect this issue is limited to only CX3 HW and
not some wide IOMMU / PCI issue.

Can Mellanox confirm that the CX3 HW & firmware can handle DMA addresses
such as below ?

is_read in_param c00000020253a000 out_param c000000403d4e000
is_read in_param c000000202b42000 out_param c000000403d4e000
is_read in_param c000000202b42000 out_param c00000020253a000

ixgbe easily work with such DMA addresses:

ixgbe: ixgbe dma_alloc_coherent: retruned virtual addr:
0xfff8001f81f48000 , dma_addr 0xc000000480112000
ixgbe: ixgbe dma_alloc_coherent: retruned virtual addr:
0xfff8001f8bdbe000 , dma_addr 0xc000000480114000
ixgbe: ixgbe dma_alloc_coherent: retruned virtual addr:
0xfff8001f8beac000 , dma_addr 0xc000000480116000

BR, Shamir

>
> --
> Doug Ledford <dledford-H+wXaHxf7aLQT0dZR+AlfA@public.gmane.org>
>     GPG KeyID: B826A3330E572FDD
>
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