From: patchwork-bot+netdevbpf@kernel.org
To: Tariq Toukan <tariqt@nvidia.com>
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Subject: Re: [PATCH net-next V6] net/mlx5: Improve write-combining test reliability for ARM64 Grace CPUs
Date: Wed, 01 Oct 2025 00:30:18 +0000 [thread overview]
Message-ID: <175927861849.2249992.11585338388238905826.git-patchwork-notify@kernel.org> (raw)
In-Reply-To: <1759093688-841357-1-git-send-email-tariqt@nvidia.com>
Hello:
This patch was applied to netdev/net-next.git (main)
by Jakub Kicinski <kuba@kernel.org>:
On Mon, 29 Sep 2025 00:08:08 +0300 you wrote:
> From: Patrisious Haddad <phaddad@nvidia.com>
>
> Write combining is an optimization feature in CPUs that is frequently
> used by modern devices to generate 32 or 64 byte TLPs at the PCIe level.
> These large TLPs allow certain optimizations in the driver to HW
> communication that improve performance. As WC is unpredictable and
> optional the HW designs all tolerate cases where combining doesn't
> happen and simply experience a performance degradation.
>
> [...]
Here is the summary with links:
- [net-next,V6] net/mlx5: Improve write-combining test reliability for ARM64 Grace CPUs
https://git.kernel.org/netdev/net-next/c/fd8c8216648c
You are awesome, thank you!
--
Deet-doot-dot, I am a bot.
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next prev parent reply other threads:[~2025-10-01 0:30 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-09-28 21:08 [PATCH net-next V6] net/mlx5: Improve write-combining test reliability for ARM64 Grace CPUs Tariq Toukan
2025-10-01 0:30 ` patchwork-bot+netdevbpf [this message]
2025-10-01 9:28 ` Paolo Abeni
2025-10-01 14:55 ` Jason Gunthorpe
2025-10-01 16:36 ` Nathan Chancellor
2025-10-01 16:45 ` Nathan Chancellor
2025-10-06 13:57 ` Sebastian Ott
2025-10-06 13:59 ` Arnd Bergmann
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