Re: [PATCH 0/5] Indirect memory registration feature

[Christoph Hellwig <hch-wEGCiKHe2LqWVfeAwA7xHQ@public.gmane.org>]

On Mon, Jun 08, 2015 at 05:42:15PM +0300, Sagi Grimberg wrote:
> I wouldn't say this is about offloading bounce buffering to silicon.
> The RDMA stack always imposed the alignment limitation as we can only
> give a page lists to the devices. Other drivers (qlogic/emulex FC
> drivers for example), use an _arbitrary_ SG lists where each element can
> point to any {addr, len}.

Those are drivers for protocols that support real SG lists.   It seems
only Infiniband and NVMe expose this silly limit.

> >So please fix it in the proper layers
> >first,
> 
> I agree that we can take care of bounce buffering in the block layer
> (or scsi for SG_IO) if the driver doesn't want to see any type of
> unaligned SG lists.
> 
> But do you think that it should come before the stack can support this?

Yes, absolutely.  The other thing that needs to come first is a proper
abstraction for MRs instead of hacking another type into all drivers.
--
To unsubscribe from this list: send the line "unsubscribe linux-rdma" in
the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html