From: Yuval Mintz <Yuval.Mintz@cavium.com>
To: davem@davemloft.net, netdev@vger.kernel.org
Cc: Michal.Kalderon@cavium.com, linux-rdma@vger.kernel.org,
Yuval Mintz <Yuval.Mintz@cavium.com>
Subject: [PATCH v2 net-next 2/7] qed: RoCE EDPM to honor PFC
Date: Sun, 18 Jun 2017 14:50:30 +0300 [thread overview]
Message-ID: <20170618115035.2156-3-Yuval.Mintz@cavium.com> (raw)
In-Reply-To: <20170618115035.2156-1-Yuval.Mintz@cavium.com>
Configure device according to DCBx results so that EDPMs
made by RoCE would honor flow-control.
Signed-off-by: Yuval Mintz <Yuval.Mintz@cavium.com>
---
drivers/net/ethernet/qlogic/qed/qed_dcbx.c | 16 ++++++++++++++++
drivers/net/ethernet/qlogic/qed/qed_reg_addr.h | 6 ++++++
2 files changed, 22 insertions(+)
diff --git a/drivers/net/ethernet/qlogic/qed/qed_dcbx.c b/drivers/net/ethernet/qlogic/qed/qed_dcbx.c
index e2a62c0..15b516a 100644
--- a/drivers/net/ethernet/qlogic/qed/qed_dcbx.c
+++ b/drivers/net/ethernet/qlogic/qed/qed_dcbx.c
@@ -896,6 +896,22 @@ qed_dcbx_mib_update_event(struct qed_hwfn *p_hwfn,
}
qed_dcbx_get_params(p_hwfn, &p_hwfn->p_dcbx_info->get, type);
+
+ if (type == QED_DCBX_OPERATIONAL_MIB) {
+ struct qed_dcbx_results *p_data;
+ u16 val;
+
+ /* Configure in NIG which protocols support EDPM and should
+ * honor PFC.
+ */
+ p_data = &p_hwfn->p_dcbx_info->results;
+ val = (0x1 << p_data->arr[DCBX_PROTOCOL_ROCE].tc) |
+ (0x1 << p_data->arr[DCBX_PROTOCOL_ROCE_V2].tc);
+ val <<= NIG_REG_TX_EDPM_CTRL_TX_EDPM_TC_EN_SHIFT;
+ val |= NIG_REG_TX_EDPM_CTRL_TX_EDPM_EN;
+ qed_wr(p_hwfn, p_ptt, NIG_REG_TX_EDPM_CTRL, val);
+ }
+
qed_dcbx_aen(p_hwfn, type);
return rc;
diff --git a/drivers/net/ethernet/qlogic/qed/qed_reg_addr.h b/drivers/net/ethernet/qlogic/qed/qed_reg_addr.h
index 7e4639c..0cdb433 100644
--- a/drivers/net/ethernet/qlogic/qed/qed_reg_addr.h
+++ b/drivers/net/ethernet/qlogic/qed/qed_reg_addr.h
@@ -1564,6 +1564,12 @@
#define NIG_REG_TSGEN_FREECNT_UPDATE_K2 0x509008UL
#define CNIG_REG_NIG_PORT0_CONF_K2 0x218200UL
+#define NIG_REG_TX_EDPM_CTRL 0x501f0cUL
+#define NIG_REG_TX_EDPM_CTRL_TX_EDPM_EN (0x1 << 0)
+#define NIG_REG_TX_EDPM_CTRL_TX_EDPM_EN_SHIFT 0
+#define NIG_REG_TX_EDPM_CTRL_TX_EDPM_TC_EN (0xff << 1)
+#define NIG_REG_TX_EDPM_CTRL_TX_EDPM_TC_EN_SHIFT 1
+
#define PRS_REG_SEARCH_GFT 0x1f11bcUL
#define PRS_REG_CM_HDR_GFT 0x1f11c8UL
#define PRS_REG_GFT_CAM 0x1f1100UL
--
2.9.4
next prev parent reply other threads:[~2017-06-18 11:50 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-06-18 11:50 [PATCH v2 net-next 0/7] qed*: RDMA and infrastructure for iWARP Yuval Mintz
2017-06-18 11:50 ` Yuval Mintz [this message]
[not found] ` <20170618115035.2156-1-Yuval.Mintz-YGCgFSpz5w/QT0dZR+AlfA@public.gmane.org>
2017-06-18 11:50 ` [PATCH v2 net-next 1/7] qed: Chain support for external PBL Yuval Mintz
2017-06-18 11:50 ` [PATCH v2 net-next 3/7] qed: Disable RoCE dpm when DCBx change occurs Yuval Mintz
2017-06-18 11:50 ` [PATCH v2 net-next 4/7] qed*: Rename qede_roce.[ch] Yuval Mintz
[not found] ` <20170618115035.2156-5-Yuval.Mintz-YGCgFSpz5w/QT0dZR+AlfA@public.gmane.org>
2017-06-18 12:00 ` Kalderon, Michal
2017-06-18 11:50 ` [PATCH v2 net-next 6/7] qed: Wait for resources before FUNC_CLOSE Yuval Mintz
2017-06-18 16:29 ` [PATCH v2 net-next 0/7] qed*: RDMA and infrastructure for iWARP David Miller
2017-06-18 17:54 ` Mintz, Yuval
2017-06-19 1:40 ` David Miller
[not found] ` <BLUPR0701MB20047CD16002072436A61EA38DC70-v5ruerSQ/oj1oiTf6dR/AE5OhdzP3rhOnBOFsp37pqbUKgpGm//BTAC/G2K4zDHf@public.gmane.org>
2017-06-19 2:36 ` Andrew Lunn
2017-06-18 11:50 ` [PATCH v2 net-next 5/7] qed*: Set rdma generic functions prefix Yuval Mintz
2017-06-18 11:50 ` [PATCH v2 net-next 7/7] qed: SPQ async callback registration Yuval Mintz
2017-06-18 13:14 ` [PATCH v2 net-next 0/7] qed*: RDMA and infrastructure for iWARP Christoph Hellwig
2017-06-19 6:28 ` Kalderon, Michal
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