Re: [PATCH rdma-core 4/8] mlx5: Avoid sparse complaints about !!

Leon Romanovsky
2017-07-13T07:34:20Z

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On Wed, Jul 12, 2017 at 03:17:38PM -0600, Jason Gunthorpe wrote:
> Sparse says:
> warning: dubious: !x & y
>
> Unclear why sparse thinks this is bad, but casting to C99 bool is the
> same as !! and much easier to read.

IMHO, it is because of usage "&" to compare boolean result.

>
> Signed-off-by: Jason Gunthorpe <jgunthorpe-ePGOBjL8dl3ta4EC/59zMFaTQe2KTcn/@public.gmane.org>
> ---
> providers/mlx5/cq.c | 21 +++++++++++----------
> 1 file changed, 11 insertions(+), 10 deletions(-)
>
> diff --git a/providers/mlx5/cq.c b/providers/mlx5/cq.c
> index 500116133c1f9e..9a8d958a9ced68 100644
> --- a/providers/mlx5/cq.c
> +++ b/providers/mlx5/cq.c
> @@ -206,11 +206,12 @@ static inline int handle_responder(struct ibv_wc *wc, struct mlx5_cqe64 *cqe,
> if (likely(cur_rsc->type == MLX5_RSC_TYPE_QP)) {
> wq = &qp->rq;
> if (qp->qp_cap_cache & MLX5_RX_CSUM_VALID)
> - wc->wc_flags |= (!!(cqe->hds_ip_ext & MLX5_CQE_L4_OK) &
> - !!(cqe->hds_ip_ext & MLX5_CQE_L3_OK) &
> - (get_cqe_l3_hdr_type(cqe) ==
> - MLX5_CQE_L3_HDR_TYPE_IPV4)) <<
> - IBV_WC_IP_CSUM_OK_SHIFT;
> + wc->wc_flags |=
> + ((bool)(cqe->hds_ip_ext & MLX5_CQE_L4_OK) &
> + (bool)(cqe->hds_ip_ext & MLX5_CQE_L3_OK) &

Those "&" should be &&.

> + (get_cqe_l3_hdr_type(cqe) ==
> + MLX5_CQE_L3_HDR_TYPE_IPV4))
> + << IBV_WC_IP_CSUM_OK_SHIFT;
> } else {
> wq = &(rsc_to_mrwq(cur_rsc)->rq);
> }
> @@ -1105,11 +1106,11 @@ static inline int mlx5_cq_read_wc_flags(struct ibv_cq_ex *ibcq)
> int wc_flags = 0;
>
> if (cq->flags & MLX5_CQ_FLAGS_RX_CSUM_VALID)
> - wc_flags = (!!(cq->cqe64->hds_ip_ext & MLX5_CQE_L4_OK) &
> - !!(cq->cqe64->hds_ip_ext & MLX5_CQE_L3_OK) &
> - (get_cqe_l3_hdr_type(cq->cqe64) ==
> - MLX5_CQE_L3_HDR_TYPE_IPV4)) <<
> - IBV_WC_IP_CSUM_OK_SHIFT;
> + wc_flags = ((bool)(cq->cqe64->hds_ip_ext & MLX5_CQE_L4_OK) &
> + (bool)(cq->cqe64->hds_ip_ext & MLX5_CQE_L3_OK) &
> + (get_cqe_l3_hdr_type(cq->cqe64) ==
> + MLX5_CQE_L3_HDR_TYPE_IPV4))
> + << IBV_WC_IP_CSUM_OK_SHIFT;
>
> switch (mlx5dv_get_cqe_opcode(cq->cqe64)) {
> case MLX5_CQE_RESP_WR_IMM:
> --
> 2.7.4
>
> --
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