[PATCH for-next 0/2] Bugfix or cleanup related to hns hardware version

[PATCH for-next 0/2] Bugfix or cleanup related to hns hardware version

[Wenpeng Liang]

Fix potential memory leaks, and modify the hop num of HIP09's EQ.

Wenpeng Liang (2):
  RDMA/hns: Fix potential memory leak in free_dip_list
  RDMA/hns: Modify the hop num of HIP09 EQ to 1

 drivers/infiniband/hw/hns/hns_roce_hw_v2.c | 5 +++--
 drivers/infiniband/hw/hns/hns_roce_hw_v2.h | 4 +++-
 2 files changed, 6 insertions(+), 3 deletions(-)

--
2.33.0

[PATCH for-next 1/2] RDMA/hns: Fix potential memory leak in free_dip_list

[Wenpeng Liang]

Hardware with a higher version than HIP09 should also release dip memory.

Fixes: f91696f2f053 ("RDMA/hns: Support congestion control type selection according to the FW")
Signed-off-by: Wenpeng Liang <liangwenpeng@huawei.com>
---
 drivers/infiniband/hw/hns/hns_roce_hw_v2.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/infiniband/hw/hns/hns_roce_hw_v2.c b/drivers/infiniband/hw/hns/hns_roce_hw_v2.c
index e681c2dc23e8..d0c0ea6754f6 100644
--- a/drivers/infiniband/hw/hns/hns_roce_hw_v2.c
+++ b/drivers/infiniband/hw/hns/hns_roce_hw_v2.c
@@ -2769,7 +2769,7 @@ static void hns_roce_v2_exit(struct hns_roce_dev *hr_dev)
 	if (!hr_dev->is_vf)
 		hns_roce_free_link_table(hr_dev);
 
-	if (hr_dev->pci_dev->revision == PCI_REVISION_ID_HIP09)
+	if (hr_dev->pci_dev->revision >= PCI_REVISION_ID_HIP09)
 		free_dip_list(hr_dev);
 }
 
-- 
2.33.0

[PATCH for-next 2/2] RDMA/hns: Modify the hop num of HIP09 EQ to 1

[Wenpeng Liang]

HIP09 EQ does not support level 2 addressing.

Signed-off-by: Wenpeng Liang <liangwenpeng@huawei.com>
---
 drivers/infiniband/hw/hns/hns_roce_hw_v2.c | 3 ++-
 drivers/infiniband/hw/hns/hns_roce_hw_v2.h | 4 +++-
 2 files changed, 5 insertions(+), 2 deletions(-)

diff --git a/drivers/infiniband/hw/hns/hns_roce_hw_v2.c b/drivers/infiniband/hw/hns/hns_roce_hw_v2.c
index d0c0ea6754f6..6d1b3f9380fe 100644
--- a/drivers/infiniband/hw/hns/hns_roce_hw_v2.c
+++ b/drivers/infiniband/hw/hns/hns_roce_hw_v2.c
@@ -2141,7 +2141,6 @@ static void apply_func_caps(struct hns_roce_dev *hr_dev)
 	caps->cqc_timer_entry_sz = HNS_ROCE_V2_CQC_TIMER_ENTRY_SZ;
 	caps->mtt_entry_sz = HNS_ROCE_V2_MTT_ENTRY_SZ;
 
-	caps->eqe_hop_num = HNS_ROCE_EQE_HOP_NUM;
 	caps->pbl_hop_num = HNS_ROCE_PBL_HOP_NUM;
 	caps->qpc_timer_hop_num = HNS_ROCE_HOP_NUM_0;
 	caps->cqc_timer_hop_num = HNS_ROCE_HOP_NUM_0;
@@ -2158,6 +2157,7 @@ static void apply_func_caps(struct hns_roce_dev *hr_dev)
 				  (u32)priv->handle->rinfo.num_vectors - 2);
 
 	if (hr_dev->pci_dev->revision >= PCI_REVISION_ID_HIP09) {
+		caps->eqe_hop_num = HNS_ROCE_V3_EQE_HOP_NUM;
 		caps->ceqe_size = HNS_ROCE_V3_EQE_SIZE;
 		caps->aeqe_size = HNS_ROCE_V3_EQE_SIZE;
 
@@ -2178,6 +2178,7 @@ static void apply_func_caps(struct hns_roce_dev *hr_dev)
 	} else {
 		u32 func_num = max_t(u32, 1, hr_dev->func_num);
 
+		caps->eqe_hop_num = HNS_ROCE_V2_EQE_HOP_NUM;
 		caps->ceqe_size = HNS_ROCE_CEQE_SIZE;
 		caps->aeqe_size = HNS_ROCE_AEQE_SIZE;
 		caps->gid_table_len[0] /= func_num;
diff --git a/drivers/infiniband/hw/hns/hns_roce_hw_v2.h b/drivers/infiniband/hw/hns/hns_roce_hw_v2.h
index fddb9bc3c14c..e9a73c34389b 100644
--- a/drivers/infiniband/hw/hns/hns_roce_hw_v2.h
+++ b/drivers/infiniband/hw/hns/hns_roce_hw_v2.h
@@ -101,12 +101,14 @@
 #define HNS_ROCE_CQE_HOP_NUM			1
 #define HNS_ROCE_SRQWQE_HOP_NUM			1
 #define HNS_ROCE_PBL_HOP_NUM			2
-#define HNS_ROCE_EQE_HOP_NUM			2
 #define HNS_ROCE_IDX_HOP_NUM			1
 #define HNS_ROCE_SQWQE_HOP_NUM			2
 #define HNS_ROCE_EXT_SGE_HOP_NUM		1
 #define HNS_ROCE_RQWQE_HOP_NUM			2
 
+#define HNS_ROCE_V2_EQE_HOP_NUM			2
+#define HNS_ROCE_V3_EQE_HOP_NUM			1
+
 #define HNS_ROCE_BA_PG_SZ_SUPPORTED_256K	6
 #define HNS_ROCE_BA_PG_SZ_SUPPORTED_16K		2
 #define HNS_ROCE_V2_GID_INDEX_NUM		16
-- 
2.33.0

Re: [PATCH for-next 1/2] RDMA/hns: Fix potential memory leak in free_dip_list

[Leon Romanovsky]

On Fri, Dec 31, 2021 at 06:13:40PM +0800, Wenpeng Liang wrote:
> Hardware with a higher version than HIP09 should also release dip memory.
> 
> Fixes: f91696f2f053 ("RDMA/hns: Support congestion control type selection according to the FW")
> Signed-off-by: Wenpeng Liang <liangwenpeng@huawei.com>
> ---
>  drivers/infiniband/hw/hns/hns_roce_hw_v2.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/infiniband/hw/hns/hns_roce_hw_v2.c b/drivers/infiniband/hw/hns/hns_roce_hw_v2.c
> index e681c2dc23e8..d0c0ea6754f6 100644
> --- a/drivers/infiniband/hw/hns/hns_roce_hw_v2.c
> +++ b/drivers/infiniband/hw/hns/hns_roce_hw_v2.c
> @@ -2769,7 +2769,7 @@ static void hns_roce_v2_exit(struct hns_roce_dev *hr_dev)
>  	if (!hr_dev->is_vf)
>  		hns_roce_free_link_table(hr_dev);
>  
> -	if (hr_dev->pci_dev->revision == PCI_REVISION_ID_HIP09)
> +	if (hr_dev->pci_dev->revision >= PCI_REVISION_ID_HIP09)

Are you referring to out-of-tree code? In upstream code,
PCI_REVISION_ID_HIP09 is the highest revision.

Thanks

>  		free_dip_list(hr_dev);
>  }
>  
> -- 
> 2.33.0
> 

Re: [PATCH for-next 2/2] RDMA/hns: Modify the hop num of HIP09 EQ to 1

[Jason Gunthorpe]

On Fri, Dec 31, 2021 at 06:13:41PM +0800, Wenpeng Liang wrote:
> HIP09 EQ does not support level 2 addressing.
> 
> Signed-off-by: Wenpeng Liang <liangwenpeng@huawei.com>
> ---
>  drivers/infiniband/hw/hns/hns_roce_hw_v2.c | 3 ++-
>  drivers/infiniband/hw/hns/hns_roce_hw_v2.h | 4 +++-
>  2 files changed, 5 insertions(+), 2 deletions(-)

Applied to for-next, thanks

Jason