* [PATCH v1 rdma-next 1/8] RDMA/mlx5: Don't keep umrable 'page_shift' in cache entries
2022-11-07 16:14 [PATCH v1 rdma-next 0/8] RDMA/mlx5: Switch MR cache to use RB-tree Michael Guralnik
@ 2022-11-07 16:14 ` Michael Guralnik
2022-11-07 16:14 ` [PATCH v1 rdma-next 2/8] RDMA/mlx5: Generalize mlx5_cache_cache_mr() to fit all cacheable mkeys Michael Guralnik
` (6 subsequent siblings)
7 siblings, 0 replies; 9+ messages in thread
From: Michael Guralnik @ 2022-11-07 16:14 UTC (permalink / raw)
To: jgg, leonro, linux-rdma; +Cc: maorg, aharonl
From: Aharon Landau <aharonl@nvidia.com>
mkc.log_page_size can be changed using UMR. Therefore, don't treat it as
a cache entry property.
Removing it from struct mlx5_cache_ent.
All cache mkeys will be created with default PAGE_SHIFT, and updated
with the needed page_shift using UMR when passing them to a user.
Signed-off-by: Aharon Landau <aharonl@nvidia.com>
---
drivers/infiniband/hw/mlx5/mlx5_ib.h | 1 -
drivers/infiniband/hw/mlx5/mr.c | 3 +--
drivers/infiniband/hw/mlx5/odp.c | 2 --
3 files changed, 1 insertion(+), 5 deletions(-)
diff --git a/drivers/infiniband/hw/mlx5/mlx5_ib.h b/drivers/infiniband/hw/mlx5/mlx5_ib.h
index 4a7f7064bd0e..ac948bb3cfe1 100644
--- a/drivers/infiniband/hw/mlx5/mlx5_ib.h
+++ b/drivers/infiniband/hw/mlx5/mlx5_ib.h
@@ -735,7 +735,6 @@ struct mlx5_cache_ent {
char name[4];
u32 order;
u32 access_mode;
- u32 page;
unsigned int ndescs;
u8 disabled:1;
diff --git a/drivers/infiniband/hw/mlx5/mr.c b/drivers/infiniband/hw/mlx5/mr.c
index 410cc5fd2523..29ad674a9bcd 100644
--- a/drivers/infiniband/hw/mlx5/mr.c
+++ b/drivers/infiniband/hw/mlx5/mr.c
@@ -297,7 +297,7 @@ static void set_cache_mkc(struct mlx5_cache_ent *ent, void *mkc)
MLX5_SET(mkc, mkc, translations_octword_size,
get_mkc_octo_size(ent->access_mode, ent->ndescs));
- MLX5_SET(mkc, mkc, log_page_size, ent->page);
+ MLX5_SET(mkc, mkc, log_page_size, PAGE_SHIFT);
}
/* Asynchronously schedule new MRs to be populated in the cache. */
@@ -765,7 +765,6 @@ int mlx5_mkey_cache_init(struct mlx5_ib_dev *dev)
if (ent->order > mkey_cache_max_order(dev))
continue;
- ent->page = PAGE_SHIFT;
ent->ndescs = 1 << ent->order;
ent->access_mode = MLX5_MKC_ACCESS_MODE_MTT;
if ((dev->mdev->profile.mask & MLX5_PROF_MASK_MR_CACHE) &&
diff --git a/drivers/infiniband/hw/mlx5/odp.c b/drivers/infiniband/hw/mlx5/odp.c
index bc97958818bb..e9a29adef7dc 100644
--- a/drivers/infiniband/hw/mlx5/odp.c
+++ b/drivers/infiniband/hw/mlx5/odp.c
@@ -1595,14 +1595,12 @@ void mlx5_odp_init_mkey_cache_entry(struct mlx5_cache_ent *ent)
switch (ent->order - 2) {
case MLX5_IMR_MTT_CACHE_ENTRY:
- ent->page = PAGE_SHIFT;
ent->ndescs = MLX5_IMR_MTT_ENTRIES;
ent->access_mode = MLX5_MKC_ACCESS_MODE_MTT;
ent->limit = 0;
break;
case MLX5_IMR_KSM_CACHE_ENTRY:
- ent->page = MLX5_KSM_PAGE_SHIFT;
ent->ndescs = mlx5_imr_ksm_entries;
ent->access_mode = MLX5_MKC_ACCESS_MODE_KSM;
ent->limit = 0;
--
2.17.2
^ permalink raw reply related [flat|nested] 9+ messages in thread* [PATCH v1 rdma-next 2/8] RDMA/mlx5: Generalize mlx5_cache_cache_mr() to fit all cacheable mkeys
2022-11-07 16:14 [PATCH v1 rdma-next 0/8] RDMA/mlx5: Switch MR cache to use RB-tree Michael Guralnik
2022-11-07 16:14 ` [PATCH v1 rdma-next 1/8] RDMA/mlx5: Don't keep umrable 'page_shift' in cache entries Michael Guralnik
@ 2022-11-07 16:14 ` Michael Guralnik
2022-11-07 16:14 ` [PATCH v1 rdma-next 3/8] RDMA/mlx5: Remove explicit ODP cache entry Michael Guralnik
` (5 subsequent siblings)
7 siblings, 0 replies; 9+ messages in thread
From: Michael Guralnik @ 2022-11-07 16:14 UTC (permalink / raw)
To: jgg, leonro, linux-rdma; +Cc: maorg, aharonl
From: Aharon Landau <aharonl@nvidia.com>
All the mkeys that can use UMR, can be cached.
Generalize the flow so that creation of all mkeys that can be cached
will go through to the cache instead of reg_create().
This will allow us to to extend the cache in following patches to
support additional non-default cache entries.
Signed-off-by: Aharon Landau <aharonl@nvidia.com>
---
drivers/infiniband/hw/mlx5/mlx5_ib.h | 6 +-
drivers/infiniband/hw/mlx5/mr.c | 147 +++++++++++++++------------
drivers/infiniband/hw/mlx5/odp.c | 9 +-
3 files changed, 87 insertions(+), 75 deletions(-)
diff --git a/drivers/infiniband/hw/mlx5/mlx5_ib.h b/drivers/infiniband/hw/mlx5/mlx5_ib.h
index ac948bb3cfe1..84d3b917c33e 100644
--- a/drivers/infiniband/hw/mlx5/mlx5_ib.h
+++ b/drivers/infiniband/hw/mlx5/mlx5_ib.h
@@ -1313,9 +1313,9 @@ int mlx5_ib_get_cqe_size(struct ib_cq *ibcq);
int mlx5_mkey_cache_init(struct mlx5_ib_dev *dev);
int mlx5_mkey_cache_cleanup(struct mlx5_ib_dev *dev);
-struct mlx5_ib_mr *mlx5_mr_cache_alloc(struct mlx5_ib_dev *dev,
- struct mlx5_cache_ent *ent,
- int access_flags);
+struct mlx5_ib_mr *mlx5_mr_cache_alloc(struct mlx5_ib_dev *dev, u8 access_mode,
+ unsigned int access_flags,
+ unsigned int ndescs);
int mlx5_ib_check_mr_status(struct ib_mr *ibmr, u32 check_mask,
struct ib_mr_status *mr_status);
diff --git a/drivers/infiniband/hw/mlx5/mr.c b/drivers/infiniband/hw/mlx5/mr.c
index 29ad674a9bcd..8ff10944ff16 100644
--- a/drivers/infiniband/hw/mlx5/mr.c
+++ b/drivers/infiniband/hw/mlx5/mr.c
@@ -287,16 +287,18 @@ static int get_mkc_octo_size(unsigned int access_mode, unsigned int ndescs)
return ret;
}
-static void set_cache_mkc(struct mlx5_cache_ent *ent, void *mkc)
+static void set_cache_mkc(struct mlx5_ib_dev *dev, u8 access_mode,
+ unsigned int access_flags, unsigned int ndescs,
+ void *mkc)
{
- set_mkc_access_pd_addr_fields(mkc, 0, 0, ent->dev->umrc.pd);
+ set_mkc_access_pd_addr_fields(mkc, access_flags, 0, dev->umrc.pd);
MLX5_SET(mkc, mkc, free, 1);
MLX5_SET(mkc, mkc, umr_en, 1);
- MLX5_SET(mkc, mkc, access_mode_1_0, ent->access_mode & 0x3);
- MLX5_SET(mkc, mkc, access_mode_4_2, (ent->access_mode >> 2) & 0x7);
+ MLX5_SET(mkc, mkc, access_mode_1_0, access_mode & 0x3);
+ MLX5_SET(mkc, mkc, access_mode_4_2, (access_mode >> 2) & 0x7);
MLX5_SET(mkc, mkc, translations_octword_size,
- get_mkc_octo_size(ent->access_mode, ent->ndescs));
+ get_mkc_octo_size(access_mode, ndescs));
MLX5_SET(mkc, mkc, log_page_size, PAGE_SHIFT);
}
@@ -315,7 +317,7 @@ static int add_keys(struct mlx5_cache_ent *ent, unsigned int num)
return -ENOMEM;
mkc = MLX5_ADDR_OF(create_mkey_in, async_create->in,
memory_key_mkey_entry);
- set_cache_mkc(ent, mkc);
+ set_cache_mkc(ent->dev, ent->access_mode, 0, ent->ndescs, mkc);
async_create->ent = ent;
err = push_mkey(ent, true, NULL);
@@ -340,8 +342,10 @@ static int add_keys(struct mlx5_cache_ent *ent, unsigned int num)
return err;
}
-/* Synchronously create a MR in the cache */
-static int create_cache_mkey(struct mlx5_cache_ent *ent, u32 *mkey)
+/* Synchronously create a cacheable mkey */
+static int create_cache_mkey(struct mlx5_ib_dev *dev, u8 access_mode,
+ unsigned int access_flags, unsigned int ndescs,
+ struct mlx5_ib_mkey *mkey)
{
size_t inlen = MLX5_ST_SZ_BYTES(create_mkey_in);
void *mkc;
@@ -352,14 +356,9 @@ static int create_cache_mkey(struct mlx5_cache_ent *ent, u32 *mkey)
if (!in)
return -ENOMEM;
mkc = MLX5_ADDR_OF(create_mkey_in, in, memory_key_mkey_entry);
- set_cache_mkc(ent, mkc);
-
- err = mlx5_core_create_mkey(ent->dev->mdev, mkey, in, inlen);
- if (err)
- goto free_in;
+ set_cache_mkc(dev, access_mode, access_flags, ndescs, mkc);
- WRITE_ONCE(ent->dev->cache.last_add, jiffies);
-free_in:
+ err = mlx5_ib_create_mkey(dev, mkey, in, inlen);
kfree(in);
return err;
}
@@ -637,41 +636,80 @@ static void delayed_cache_work_func(struct work_struct *work)
__cache_work_func(ent);
}
-struct mlx5_ib_mr *mlx5_mr_cache_alloc(struct mlx5_ib_dev *dev,
- struct mlx5_cache_ent *ent,
- int access_flags)
+static bool mlx5_ent_get_mkey(struct mlx5_cache_ent *ent, struct mlx5_ib_mr *mr)
{
- struct mlx5_ib_mr *mr;
- int err;
+ xa_lock_irq(&ent->mkeys);
+ if (!ent->stored) {
+ queue_adjust_cache_locked(ent);
+ ent->miss++;
+ xa_unlock_irq(&ent->mkeys);
+ return false;
+ }
+
+ mr->mmkey.key = pop_stored_mkey(ent);
+ mr->mmkey.ndescs = ent->ndescs;
+ mr->mmkey.cache_ent = ent;
+ queue_adjust_cache_locked(ent);
+ ent->in_use++;
+ xa_unlock_irq(&ent->mkeys);
+ return true;
+}
+
+static struct mlx5_cache_ent *mkey_cache_ent_from_order(struct mlx5_ib_dev *dev,
+ unsigned int order)
+{
+ struct mlx5_mkey_cache *cache = &dev->cache;
+
+ if (order < cache->ent[0].order)
+ return &cache->ent[0];
+ order = order - cache->ent[0].order;
+ if (order > MKEY_CACHE_LAST_STD_ENTRY)
+ return NULL;
+ return &cache->ent[order];
+}
+
+static bool mlx5_cache_get_mkey(struct mlx5_ib_dev *dev, u8 access_mode,
+ u8 access_flags, unsigned int ndescs,
+ struct mlx5_ib_mr *mr)
+{
+ struct mlx5_cache_ent *ent;
if (!mlx5r_umr_can_reconfig(dev, 0, access_flags))
- return ERR_PTR(-EOPNOTSUPP);
+ return false;
+
+ if (access_mode == MLX5_MKC_ACCESS_MODE_KSM)
+ ent = &dev->cache.ent[MLX5_IMR_KSM_CACHE_ENTRY];
+
+ ent = mkey_cache_ent_from_order(dev, order_base_2(ndescs));
+ if (!ent)
+ return false;
+
+ return mlx5_ent_get_mkey(ent, mr);
+}
+
+struct mlx5_ib_mr *mlx5_mr_cache_alloc(struct mlx5_ib_dev *dev, u8 access_mode,
+ unsigned int access_flags,
+ unsigned int ndescs)
+{
+ struct mlx5_ib_mr *mr;
+ int err;
mr = kzalloc(sizeof(*mr), GFP_KERNEL);
if (!mr)
return ERR_PTR(-ENOMEM);
- xa_lock_irq(&ent->mkeys);
- ent->in_use++;
-
- if (!ent->stored) {
- queue_adjust_cache_locked(ent);
- ent->miss++;
- xa_unlock_irq(&ent->mkeys);
- err = create_cache_mkey(ent, &mr->mmkey.key);
+ if (!mlx5_cache_get_mkey(dev, access_mode, access_flags, ndescs, mr)) {
+ /*
+ * Didn't find an mkey in cache.
+ * Create an mkey with the exact needed size.
+ */
+ err = create_cache_mkey(dev, access_mode, access_flags, ndescs,
+ &mr->mmkey);
if (err) {
- xa_lock_irq(&ent->mkeys);
- ent->in_use--;
- xa_unlock_irq(&ent->mkeys);
kfree(mr);
return ERR_PTR(err);
}
- } else {
- mr->mmkey.key = pop_stored_mkey(ent);
- queue_adjust_cache_locked(ent);
- xa_unlock_irq(&ent->mkeys);
}
- mr->mmkey.cache_ent = ent;
mr->mmkey.type = MLX5_MKEY_MR;
init_waitqueue_head(&mr->mmkey.wait);
return mr;
@@ -876,19 +914,6 @@ static int mkey_cache_max_order(struct mlx5_ib_dev *dev)
return MLX5_MAX_UMR_SHIFT;
}
-static struct mlx5_cache_ent *mkey_cache_ent_from_order(struct mlx5_ib_dev *dev,
- unsigned int order)
-{
- struct mlx5_mkey_cache *cache = &dev->cache;
-
- if (order < cache->ent[0].order)
- return &cache->ent[0];
- order = order - cache->ent[0].order;
- if (order > MKEY_CACHE_LAST_STD_ENTRY)
- return NULL;
- return &cache->ent[order];
-}
-
static void set_mr_fields(struct mlx5_ib_dev *dev, struct mlx5_ib_mr *mr,
u64 length, int access_flags, u64 iova)
{
@@ -916,9 +941,8 @@ static struct mlx5_ib_mr *alloc_cacheable_mr(struct ib_pd *pd,
int access_flags)
{
struct mlx5_ib_dev *dev = to_mdev(pd->device);
- struct mlx5_cache_ent *ent;
+ unsigned int page_size, ndescs;
struct mlx5_ib_mr *mr;
- unsigned int page_size;
if (umem->is_dmabuf)
page_size = mlx5_umem_dmabuf_default_pgsz(umem, iova);
@@ -927,22 +951,11 @@ static struct mlx5_ib_mr *alloc_cacheable_mr(struct ib_pd *pd,
0, iova);
if (WARN_ON(!page_size))
return ERR_PTR(-EINVAL);
- ent = mkey_cache_ent_from_order(
- dev, order_base_2(ib_umem_num_dma_blocks(umem, page_size)));
- /*
- * Matches access in alloc_cache_mr(). If the MR can't come from the
- * cache then synchronously create an uncached one.
- */
- if (!ent || ent->limit == 0 ||
- !mlx5r_umr_can_reconfig(dev, 0, access_flags) ||
- mlx5_umem_needs_ats(dev, umem, access_flags)) {
- mutex_lock(&dev->slow_path_mutex);
- mr = reg_create(pd, umem, iova, access_flags, page_size, false);
- mutex_unlock(&dev->slow_path_mutex);
- return mr;
- }
- mr = mlx5_mr_cache_alloc(dev, ent, access_flags);
+ ndescs = ib_umem_num_dma_blocks(umem, page_size);
+
+ mr = mlx5_mr_cache_alloc(dev, MLX5_MKC_ACCESS_MODE_MTT,
+ access_flags, ndescs);
if (IS_ERR(mr))
return mr;
diff --git a/drivers/infiniband/hw/mlx5/odp.c b/drivers/infiniband/hw/mlx5/odp.c
index e9a29adef7dc..f7c9eeaa8e79 100644
--- a/drivers/infiniband/hw/mlx5/odp.c
+++ b/drivers/infiniband/hw/mlx5/odp.c
@@ -418,8 +418,8 @@ static struct mlx5_ib_mr *implicit_get_child_mr(struct mlx5_ib_mr *imr,
if (IS_ERR(odp))
return ERR_CAST(odp);
- mr = mlx5_mr_cache_alloc(dev, &dev->cache.ent[MLX5_IMR_MTT_CACHE_ENTRY],
- imr->access_flags);
+ mr = mlx5_mr_cache_alloc(dev, MLX5_MKC_ACCESS_MODE_MTT,
+ imr->access_flags, MLX5_IMR_MTT_ENTRIES);
if (IS_ERR(mr)) {
ib_umem_odp_release(odp);
return mr;
@@ -493,9 +493,8 @@ struct mlx5_ib_mr *mlx5_ib_alloc_implicit_mr(struct mlx5_ib_pd *pd,
if (IS_ERR(umem_odp))
return ERR_CAST(umem_odp);
- imr = mlx5_mr_cache_alloc(dev,
- &dev->cache.ent[MLX5_IMR_KSM_CACHE_ENTRY],
- access_flags);
+ imr = mlx5_mr_cache_alloc(dev, MLX5_MKC_ACCESS_MODE_KSM, access_flags,
+ mlx5_imr_ksm_entries);
if (IS_ERR(imr)) {
ib_umem_odp_release(umem_odp);
return imr;
--
2.17.2
^ permalink raw reply related [flat|nested] 9+ messages in thread* [PATCH v1 rdma-next 3/8] RDMA/mlx5: Remove explicit ODP cache entry
2022-11-07 16:14 [PATCH v1 rdma-next 0/8] RDMA/mlx5: Switch MR cache to use RB-tree Michael Guralnik
2022-11-07 16:14 ` [PATCH v1 rdma-next 1/8] RDMA/mlx5: Don't keep umrable 'page_shift' in cache entries Michael Guralnik
2022-11-07 16:14 ` [PATCH v1 rdma-next 2/8] RDMA/mlx5: Generalize mlx5_cache_cache_mr() to fit all cacheable mkeys Michael Guralnik
@ 2022-11-07 16:14 ` Michael Guralnik
2022-11-07 16:14 ` [PATCH v1 rdma-next 4/8] RDMA/mlx5: Allow rereg all the mkeys that can load pas with UMR Michael Guralnik
` (4 subsequent siblings)
7 siblings, 0 replies; 9+ messages in thread
From: Michael Guralnik @ 2022-11-07 16:14 UTC (permalink / raw)
To: jgg, leonro, linux-rdma; +Cc: maorg, aharonl
From: Aharon Landau <aharonl@nvidia.com>
Explicit ODP mkey doesn't have unique properties. There is no need to
devote to it a special entry. Removing it.
Signed-off-by: Aharon Landau <aharonl@nvidia.com>
---
drivers/infiniband/hw/mlx5/odp.c | 16 ++--------------
include/linux/mlx5/driver.h | 1 -
2 files changed, 2 insertions(+), 15 deletions(-)
diff --git a/drivers/infiniband/hw/mlx5/odp.c b/drivers/infiniband/hw/mlx5/odp.c
index f7c9eeaa8e79..137143da5959 100644
--- a/drivers/infiniband/hw/mlx5/odp.c
+++ b/drivers/infiniband/hw/mlx5/odp.c
@@ -1591,20 +1591,8 @@ void mlx5_odp_init_mkey_cache_entry(struct mlx5_cache_ent *ent)
{
if (!(ent->dev->odp_caps.general_caps & IB_ODP_SUPPORT_IMPLICIT))
return;
-
- switch (ent->order - 2) {
- case MLX5_IMR_MTT_CACHE_ENTRY:
- ent->ndescs = MLX5_IMR_MTT_ENTRIES;
- ent->access_mode = MLX5_MKC_ACCESS_MODE_MTT;
- ent->limit = 0;
- break;
-
- case MLX5_IMR_KSM_CACHE_ENTRY:
- ent->ndescs = mlx5_imr_ksm_entries;
- ent->access_mode = MLX5_MKC_ACCESS_MODE_KSM;
- ent->limit = 0;
- break;
- }
+ ent->ndescs = mlx5_imr_ksm_entries;
+ ent->access_mode = MLX5_MKC_ACCESS_MODE_KSM;
}
static const struct ib_device_ops mlx5_ib_dev_odp_ops = {
diff --git a/include/linux/mlx5/driver.h b/include/linux/mlx5/driver.h
index a12929bc31b2..bc13143f1a87 100644
--- a/include/linux/mlx5/driver.h
+++ b/include/linux/mlx5/driver.h
@@ -736,7 +736,6 @@ enum {
enum {
MKEY_CACHE_LAST_STD_ENTRY = 20,
- MLX5_IMR_MTT_CACHE_ENTRY,
MLX5_IMR_KSM_CACHE_ENTRY,
MAX_MKEY_CACHE_ENTRIES
};
--
2.17.2
^ permalink raw reply related [flat|nested] 9+ messages in thread* [PATCH v1 rdma-next 4/8] RDMA/mlx5: Allow rereg all the mkeys that can load pas with UMR
2022-11-07 16:14 [PATCH v1 rdma-next 0/8] RDMA/mlx5: Switch MR cache to use RB-tree Michael Guralnik
` (2 preceding siblings ...)
2022-11-07 16:14 ` [PATCH v1 rdma-next 3/8] RDMA/mlx5: Remove explicit ODP cache entry Michael Guralnik
@ 2022-11-07 16:14 ` Michael Guralnik
2022-11-07 16:14 ` [PATCH v1 rdma-next 5/8] RDMA/mlx5: Introduce mlx5r_cache_rb_key Michael Guralnik
` (3 subsequent siblings)
7 siblings, 0 replies; 9+ messages in thread
From: Michael Guralnik @ 2022-11-07 16:14 UTC (permalink / raw)
To: jgg, leonro, linux-rdma; +Cc: maorg, aharonl
From: Aharon Landau <aharonl@nvidia.com>
Keep track of the mkey size of all cacheable mkeys, and by this allow to
rereg them.
Signed-off-by: Aharon Landau <aharonl@nvidia.com>
---
drivers/infiniband/hw/mlx5/mr.c | 7 ++-----
1 file changed, 2 insertions(+), 5 deletions(-)
diff --git a/drivers/infiniband/hw/mlx5/mr.c b/drivers/infiniband/hw/mlx5/mr.c
index 8ff10944ff16..fe5567c57897 100644
--- a/drivers/infiniband/hw/mlx5/mr.c
+++ b/drivers/infiniband/hw/mlx5/mr.c
@@ -709,6 +709,7 @@ struct mlx5_ib_mr *mlx5_mr_cache_alloc(struct mlx5_ib_dev *dev, u8 access_mode,
kfree(mr);
return ERR_PTR(err);
}
+ mr->mmkey.ndescs = ndescs;
}
mr->mmkey.type = MLX5_MKEY_MR;
init_waitqueue_head(&mr->mmkey.wait);
@@ -1374,9 +1375,6 @@ static bool can_use_umr_rereg_pas(struct mlx5_ib_mr *mr,
{
struct mlx5_ib_dev *dev = to_mdev(mr->ibmr.device);
- /* We only track the allocated sizes of MRs from the cache */
- if (!mr->mmkey.cache_ent)
- return false;
if (!mlx5r_umr_can_load_pas(dev, new_umem->length))
return false;
@@ -1384,8 +1382,7 @@ static bool can_use_umr_rereg_pas(struct mlx5_ib_mr *mr,
mlx5_umem_find_best_pgsz(new_umem, mkc, log_page_size, 0, iova);
if (WARN_ON(!*page_size))
return false;
- return (1ULL << mr->mmkey.cache_ent->order) >=
- ib_umem_num_dma_blocks(new_umem, *page_size);
+ return mr->mmkey.ndescs >= ib_umem_num_dma_blocks(new_umem, *page_size);
}
static int umr_rereg_pas(struct mlx5_ib_mr *mr, struct ib_pd *pd,
--
2.17.2
^ permalink raw reply related [flat|nested] 9+ messages in thread* [PATCH v1 rdma-next 5/8] RDMA/mlx5: Introduce mlx5r_cache_rb_key
2022-11-07 16:14 [PATCH v1 rdma-next 0/8] RDMA/mlx5: Switch MR cache to use RB-tree Michael Guralnik
` (3 preceding siblings ...)
2022-11-07 16:14 ` [PATCH v1 rdma-next 4/8] RDMA/mlx5: Allow rereg all the mkeys that can load pas with UMR Michael Guralnik
@ 2022-11-07 16:14 ` Michael Guralnik
2022-11-07 16:14 ` [PATCH v1 rdma-next 6/8] RDMA/mlx5: Change the cache structure to an RB-tree Michael Guralnik
` (2 subsequent siblings)
7 siblings, 0 replies; 9+ messages in thread
From: Michael Guralnik @ 2022-11-07 16:14 UTC (permalink / raw)
To: jgg, leonro, linux-rdma; +Cc: maorg, aharonl
From: Aharon Landau <aharonl@nvidia.com>
In the next patch, I will change the cache structure to an RB tree.
Introducing the key of the tree.
The key is all the mkey properties that UMR operations can't modify.
Using this key to define the cache entries and to search and create
cache mkeys.
Signed-off-by: Aharon Landau <aharonl@nvidia.com>
---
drivers/infiniband/hw/mlx5/mlx5_ib.h | 14 +++++-
drivers/infiniband/hw/mlx5/mr.c | 73 +++++++++++++++++++---------
drivers/infiniband/hw/mlx5/odp.c | 8 ++-
3 files changed, 69 insertions(+), 26 deletions(-)
diff --git a/drivers/infiniband/hw/mlx5/mlx5_ib.h b/drivers/infiniband/hw/mlx5/mlx5_ib.h
index 84d3b917c33e..939ec3759eba 100644
--- a/drivers/infiniband/hw/mlx5/mlx5_ib.h
+++ b/drivers/infiniband/hw/mlx5/mlx5_ib.h
@@ -613,6 +613,16 @@ enum mlx5_mkey_type {
MLX5_MKEY_INDIRECT_DEVX,
};
+struct mlx5r_cache_rb_key {
+ unsigned int access_mode;
+ unsigned int access_flags;
+ /*
+ * keep ndescs as the last member so entries with about the same ndescs
+ * will be close in the tree
+ */
+ unsigned int ndescs;
+};
+
struct mlx5_ib_mkey {
u32 key;
enum mlx5_mkey_type type;
@@ -732,10 +742,10 @@ struct mlx5_cache_ent {
unsigned long stored;
unsigned long reserved;
+ struct mlx5r_cache_rb_key rb_key;
+
char name[4];
u32 order;
- u32 access_mode;
- unsigned int ndescs;
u8 disabled:1;
u8 fill_to_high_water:1;
diff --git a/drivers/infiniband/hw/mlx5/mr.c b/drivers/infiniband/hw/mlx5/mr.c
index fe5567c57897..e7a3d4fa52d0 100644
--- a/drivers/infiniband/hw/mlx5/mr.c
+++ b/drivers/infiniband/hw/mlx5/mr.c
@@ -287,18 +287,18 @@ static int get_mkc_octo_size(unsigned int access_mode, unsigned int ndescs)
return ret;
}
-static void set_cache_mkc(struct mlx5_ib_dev *dev, u8 access_mode,
- unsigned int access_flags, unsigned int ndescs,
- void *mkc)
+static void set_cache_mkc(struct mlx5_ib_dev *dev,
+ struct mlx5r_cache_rb_key rb_key, void *mkc)
{
- set_mkc_access_pd_addr_fields(mkc, access_flags, 0, dev->umrc.pd);
+ set_mkc_access_pd_addr_fields(mkc, rb_key.access_flags, 0,
+ dev->umrc.pd);
MLX5_SET(mkc, mkc, free, 1);
MLX5_SET(mkc, mkc, umr_en, 1);
- MLX5_SET(mkc, mkc, access_mode_1_0, access_mode & 0x3);
- MLX5_SET(mkc, mkc, access_mode_4_2, (access_mode >> 2) & 0x7);
+ MLX5_SET(mkc, mkc, access_mode_1_0, rb_key.access_mode & 0x3);
+ MLX5_SET(mkc, mkc, access_mode_4_2, (rb_key.access_mode >> 2) & 0x7);
MLX5_SET(mkc, mkc, translations_octword_size,
- get_mkc_octo_size(access_mode, ndescs));
+ get_mkc_octo_size(rb_key.access_mode, rb_key.ndescs));
MLX5_SET(mkc, mkc, log_page_size, PAGE_SHIFT);
}
@@ -317,7 +317,7 @@ static int add_keys(struct mlx5_cache_ent *ent, unsigned int num)
return -ENOMEM;
mkc = MLX5_ADDR_OF(create_mkey_in, async_create->in,
memory_key_mkey_entry);
- set_cache_mkc(ent->dev, ent->access_mode, 0, ent->ndescs, mkc);
+ set_cache_mkc(ent->dev, ent->rb_key, mkc);
async_create->ent = ent;
err = push_mkey(ent, true, NULL);
@@ -343,8 +343,8 @@ static int add_keys(struct mlx5_cache_ent *ent, unsigned int num)
}
/* Synchronously create a cacheable mkey */
-static int create_cache_mkey(struct mlx5_ib_dev *dev, u8 access_mode,
- unsigned int access_flags, unsigned int ndescs,
+static int create_cache_mkey(struct mlx5_ib_dev *dev,
+ struct mlx5r_cache_rb_key rb_key,
struct mlx5_ib_mkey *mkey)
{
size_t inlen = MLX5_ST_SZ_BYTES(create_mkey_in);
@@ -356,7 +356,7 @@ static int create_cache_mkey(struct mlx5_ib_dev *dev, u8 access_mode,
if (!in)
return -ENOMEM;
mkc = MLX5_ADDR_OF(create_mkey_in, in, memory_key_mkey_entry);
- set_cache_mkc(dev, access_mode, access_flags, ndescs, mkc);
+ set_cache_mkc(dev, rb_key, mkc);
err = mlx5_ib_create_mkey(dev, mkey, in, inlen);
kfree(in);
@@ -647,7 +647,7 @@ static bool mlx5_ent_get_mkey(struct mlx5_cache_ent *ent, struct mlx5_ib_mr *mr)
}
mr->mmkey.key = pop_stored_mkey(ent);
- mr->mmkey.ndescs = ent->ndescs;
+ mr->mmkey.ndescs = ent->rb_key.ndescs;
mr->mmkey.cache_ent = ent;
queue_adjust_cache_locked(ent);
ent->in_use++;
@@ -668,29 +668,57 @@ static struct mlx5_cache_ent *mkey_cache_ent_from_order(struct mlx5_ib_dev *dev,
return &cache->ent[order];
}
-static bool mlx5_cache_get_mkey(struct mlx5_ib_dev *dev, u8 access_mode,
- u8 access_flags, unsigned int ndescs,
+static bool mlx5_cache_get_mkey(struct mlx5_ib_dev *dev,
+ struct mlx5r_cache_rb_key rb_key,
struct mlx5_ib_mr *mr)
{
struct mlx5_cache_ent *ent;
- if (!mlx5r_umr_can_reconfig(dev, 0, access_flags))
+ if (!mlx5r_umr_can_reconfig(dev, 0, rb_key.access_flags))
return false;
- if (access_mode == MLX5_MKC_ACCESS_MODE_KSM)
+ if (rb_key.access_mode == MLX5_MKC_ACCESS_MODE_KSM)
ent = &dev->cache.ent[MLX5_IMR_KSM_CACHE_ENTRY];
- ent = mkey_cache_ent_from_order(dev, order_base_2(ndescs));
+ ent = mkey_cache_ent_from_order(dev, order_base_2(rb_key.ndescs));
if (!ent)
return false;
return mlx5_ent_get_mkey(ent, mr);
}
+static int get_uchangeable_access_flags(struct mlx5_ib_dev *dev,
+ int access_flags)
+{
+ int ret = 0;
+
+ if ((access_flags & IB_ACCESS_REMOTE_ATOMIC) &&
+ MLX5_CAP_GEN(dev->mdev, atomic) &&
+ MLX5_CAP_GEN(dev->mdev, umr_modify_atomic_disabled))
+ ret |= IB_ACCESS_REMOTE_ATOMIC;
+
+ if ((access_flags & IB_ACCESS_RELAXED_ORDERING) &&
+ MLX5_CAP_GEN(dev->mdev, relaxed_ordering_write) &&
+ !MLX5_CAP_GEN(dev->mdev, relaxed_ordering_write_umr))
+ ret |= IB_ACCESS_RELAXED_ORDERING;
+
+ if ((access_flags & IB_ACCESS_RELAXED_ORDERING) &&
+ MLX5_CAP_GEN(dev->mdev, relaxed_ordering_read) &&
+ !MLX5_CAP_GEN(dev->mdev, relaxed_ordering_read_umr))
+ ret |= IB_ACCESS_RELAXED_ORDERING;
+
+ return ret;
+}
+
struct mlx5_ib_mr *mlx5_mr_cache_alloc(struct mlx5_ib_dev *dev, u8 access_mode,
unsigned int access_flags,
unsigned int ndescs)
{
+ struct mlx5r_cache_rb_key rb_key = {
+ .access_mode = access_mode,
+ .access_flags = get_uchangeable_access_flags(dev, access_flags),
+ .ndescs = ndescs
+ };
struct mlx5_ib_mr *mr;
int err;
@@ -698,13 +726,12 @@ struct mlx5_ib_mr *mlx5_mr_cache_alloc(struct mlx5_ib_dev *dev, u8 access_mode,
if (!mr)
return ERR_PTR(-ENOMEM);
- if (!mlx5_cache_get_mkey(dev, access_mode, access_flags, ndescs, mr)) {
+ if (!mlx5_cache_get_mkey(dev, rb_key, mr)) {
/*
* Didn't find an mkey in cache.
* Create an mkey with the exact needed size.
*/
- err = create_cache_mkey(dev, access_mode, access_flags, ndescs,
- &mr->mmkey);
+ err = create_cache_mkey(dev, rb_key, &mr->mmkey);
if (err) {
kfree(mr);
return ERR_PTR(err);
@@ -774,6 +801,8 @@ static void delay_time_func(struct timer_list *t)
int mlx5_mkey_cache_init(struct mlx5_ib_dev *dev)
{
+ struct mlx5r_cache_rb_key rb_key = { .access_mode =
+ MLX5_MKC_ACCESS_MODE_MTT };
struct mlx5_mkey_cache *cache = &dev->cache;
struct mlx5_cache_ent *ent;
int i;
@@ -804,8 +833,8 @@ int mlx5_mkey_cache_init(struct mlx5_ib_dev *dev)
if (ent->order > mkey_cache_max_order(dev))
continue;
- ent->ndescs = 1 << ent->order;
- ent->access_mode = MLX5_MKC_ACCESS_MODE_MTT;
+ rb_key.ndescs = 1 << ent->order;
+ ent->rb_key = rb_key;
if ((dev->mdev->profile.mask & MLX5_PROF_MASK_MR_CACHE) &&
!dev->is_rep && mlx5_core_is_pf(dev->mdev) &&
mlx5r_umr_can_load_pas(dev, 0))
diff --git a/drivers/infiniband/hw/mlx5/odp.c b/drivers/infiniband/hw/mlx5/odp.c
index 137143da5959..90339edddfed 100644
--- a/drivers/infiniband/hw/mlx5/odp.c
+++ b/drivers/infiniband/hw/mlx5/odp.c
@@ -1589,10 +1589,14 @@ mlx5_ib_odp_destroy_eq(struct mlx5_ib_dev *dev, struct mlx5_ib_pf_eq *eq)
void mlx5_odp_init_mkey_cache_entry(struct mlx5_cache_ent *ent)
{
+ struct mlx5r_cache_rb_key rb_key = {
+ .access_mode = MLX5_MKC_ACCESS_MODE_KSM,
+ .ndescs = mlx5_imr_ksm_entries
+ };
+
if (!(ent->dev->odp_caps.general_caps & IB_ODP_SUPPORT_IMPLICIT))
return;
- ent->ndescs = mlx5_imr_ksm_entries;
- ent->access_mode = MLX5_MKC_ACCESS_MODE_KSM;
+ ent->rb_key = rb_key;
}
static const struct ib_device_ops mlx5_ib_dev_odp_ops = {
--
2.17.2
^ permalink raw reply related [flat|nested] 9+ messages in thread* [PATCH v1 rdma-next 6/8] RDMA/mlx5: Change the cache structure to an RB-tree
2022-11-07 16:14 [PATCH v1 rdma-next 0/8] RDMA/mlx5: Switch MR cache to use RB-tree Michael Guralnik
` (4 preceding siblings ...)
2022-11-07 16:14 ` [PATCH v1 rdma-next 5/8] RDMA/mlx5: Introduce mlx5r_cache_rb_key Michael Guralnik
@ 2022-11-07 16:14 ` Michael Guralnik
2022-11-07 16:14 ` [PATCH v1 rdma-next 7/8] RDMA/mlx5: Cache all user cacheable mkeys on dereg MR flow Michael Guralnik
2022-11-07 16:14 ` [PATCH v1 rdma-next 8/8] RDMA/mlx5: Add work to remove temporary entries from the cache Michael Guralnik
7 siblings, 0 replies; 9+ messages in thread
From: Michael Guralnik @ 2022-11-07 16:14 UTC (permalink / raw)
To: jgg, leonro, linux-rdma; +Cc: maorg, aharonl
From: Aharon Landau <aharonl@nvidia.com>
Currently, the cache structure is a static linear array. Therefore, his
size is limited to the number of entries in it and is not expandable.
The entries are dedicated to mkeys of size 2^x and no
access_flags. Mkeys with different properties are not cacheable.
In this patch, we change the cache structure to an RB-tree.
By this, we enable caching all user mkeys that can use umr.
Signed-off-by: Aharon Landau <aharonl@nvidia.com>
---
drivers/infiniband/hw/mlx5/mlx5_ib.h | 17 +-
drivers/infiniband/hw/mlx5/mr.c | 307 +++++++++++++++++++--------
drivers/infiniband/hw/mlx5/odp.c | 9 +-
3 files changed, 237 insertions(+), 96 deletions(-)
diff --git a/drivers/infiniband/hw/mlx5/mlx5_ib.h b/drivers/infiniband/hw/mlx5/mlx5_ib.h
index 939ec3759eba..0bf2511fdfe4 100644
--- a/drivers/infiniband/hw/mlx5/mlx5_ib.h
+++ b/drivers/infiniband/hw/mlx5/mlx5_ib.h
@@ -742,10 +742,10 @@ struct mlx5_cache_ent {
unsigned long stored;
unsigned long reserved;
+ struct rb_node node;
struct mlx5r_cache_rb_key rb_key;
char name[4];
- u32 order;
u8 disabled:1;
u8 fill_to_high_water:1;
@@ -776,8 +776,9 @@ struct mlx5r_async_create_mkey {
struct mlx5_mkey_cache {
struct workqueue_struct *wq;
- struct mlx5_cache_ent ent[MAX_MKEY_CACHE_ENTRIES];
- struct dentry *root;
+ struct rb_root rb_root;
+ struct mutex rb_lock;
+ struct dentry *fs_root;
unsigned long last_add;
};
@@ -1322,6 +1323,8 @@ void mlx5_ib_copy_pas(u64 *old, u64 *new, int step, int num);
int mlx5_ib_get_cqe_size(struct ib_cq *ibcq);
int mlx5_mkey_cache_init(struct mlx5_ib_dev *dev);
int mlx5_mkey_cache_cleanup(struct mlx5_ib_dev *dev);
+struct mlx5_cache_ent *mlx5r_cache_create_ent(struct mlx5_ib_dev *dev,
+ struct mlx5r_cache_rb_key rb_key);
struct mlx5_ib_mr *mlx5_mr_cache_alloc(struct mlx5_ib_dev *dev, u8 access_mode,
unsigned int access_flags,
@@ -1349,7 +1352,7 @@ int mlx5r_odp_create_eq(struct mlx5_ib_dev *dev, struct mlx5_ib_pf_eq *eq);
void mlx5_ib_odp_cleanup_one(struct mlx5_ib_dev *ibdev);
int __init mlx5_ib_odp_init(void);
void mlx5_ib_odp_cleanup(void);
-void mlx5_odp_init_mkey_cache_entry(struct mlx5_cache_ent *ent);
+struct mlx5_cache_ent *mlx5_odp_init_mkey_cache_entry(struct mlx5_ib_dev *dev);
void mlx5_odp_populate_xlt(void *xlt, size_t idx, size_t nentries,
struct mlx5_ib_mr *mr, int flags);
@@ -1368,7 +1371,11 @@ static inline int mlx5r_odp_create_eq(struct mlx5_ib_dev *dev,
static inline void mlx5_ib_odp_cleanup_one(struct mlx5_ib_dev *ibdev) {}
static inline int mlx5_ib_odp_init(void) { return 0; }
static inline void mlx5_ib_odp_cleanup(void) {}
-static inline void mlx5_odp_init_mkey_cache_entry(struct mlx5_cache_ent *ent) {}
+static inline struct mlx5_cache_ent *
+mlx5_odp_init_mkey_cache_entry(struct mlx5_ib_dev *dev)
+{
+ return NULL;
+}
static inline void mlx5_odp_populate_xlt(void *xlt, size_t idx, size_t nentries,
struct mlx5_ib_mr *mr, int flags) {}
diff --git a/drivers/infiniband/hw/mlx5/mr.c b/drivers/infiniband/hw/mlx5/mr.c
index e7a3d4fa52d0..df3e551ad7cd 100644
--- a/drivers/infiniband/hw/mlx5/mr.c
+++ b/drivers/infiniband/hw/mlx5/mr.c
@@ -514,18 +514,22 @@ static const struct file_operations limit_fops = {
static bool someone_adding(struct mlx5_mkey_cache *cache)
{
- unsigned int i;
-
- for (i = 0; i < MAX_MKEY_CACHE_ENTRIES; i++) {
- struct mlx5_cache_ent *ent = &cache->ent[i];
- bool ret;
+ struct mlx5_cache_ent *ent;
+ struct rb_node *node;
+ bool ret;
+ mutex_lock(&cache->rb_lock);
+ for (node = rb_first(&cache->rb_root); node; node = rb_next(node)) {
+ ent = rb_entry(node, struct mlx5_cache_ent, node);
xa_lock_irq(&ent->mkeys);
ret = ent->stored < ent->limit;
xa_unlock_irq(&ent->mkeys);
- if (ret)
+ if (ret) {
+ mutex_unlock(&cache->rb_lock);
return true;
+ }
}
+ mutex_unlock(&cache->rb_lock);
return false;
}
@@ -589,8 +593,8 @@ static void __cache_work_func(struct mlx5_cache_ent *ent)
if (err != -EAGAIN) {
mlx5_ib_warn(
dev,
- "command failed order %d, err %d\n",
- ent->order, err);
+ "command failed order %s, err %d\n",
+ ent->name, err);
queue_delayed_work(cache->wq, &ent->dwork,
msecs_to_jiffies(1000));
}
@@ -636,6 +640,86 @@ static void delayed_cache_work_func(struct work_struct *work)
__cache_work_func(ent);
}
+static int cache_rb_key_cmp(struct mlx5r_cache_rb_key cur,
+ struct mlx5r_cache_rb_key lookup)
+{
+ int ret;
+
+ ret = cur.access_mode - lookup.access_mode;
+ if (ret)
+ return ret;
+
+ ret = cur.access_flags - lookup.access_flags;
+ if (ret)
+ return ret;
+
+ return cur.ndescs - lookup.ndescs;
+}
+
+static int mlx5_cache_ent_insert(struct mlx5_mkey_cache *cache,
+ struct mlx5_cache_ent *ent)
+{
+ struct rb_node **new = &cache->rb_root.rb_node, *parent = NULL;
+ struct mlx5_cache_ent *cur;
+ int cmp;
+
+ mutex_lock(&cache->rb_lock);
+ /* Figure out where to put new node */
+ while (*new) {
+ cur = rb_entry(*new, struct mlx5_cache_ent, node);
+ parent = *new;
+ cmp = cache_rb_key_cmp(ent->rb_key, cur->rb_key);
+ if (cmp < 0)
+ new = &((*new)->rb_left);
+ if (cmp > 0)
+ new = &((*new)->rb_right);
+ if (cmp == 0) {
+ mutex_unlock(&cache->rb_lock);
+ return -EEXIST;
+ }
+ }
+
+ /* Add new node and rebalance tree. */
+ rb_link_node(&ent->node, parent, new);
+ rb_insert_color(&ent->node, &cache->rb_root);
+
+ mutex_unlock(&cache->rb_lock);
+ return 0;
+}
+
+static struct rb_node *
+mlx5_cache_find_smallest_ent(struct mlx5_mkey_cache *cache,
+ struct mlx5r_cache_rb_key rb_key)
+{
+ struct rb_node *node = cache->rb_root.rb_node;
+ struct mlx5_cache_ent *cur, *smallest = NULL;
+ int cmp;
+
+ /*
+ * Find the smallest ent with ent.rb_key >= rb_key.
+ */
+ while (node) {
+ cur = rb_entry(node, struct mlx5_cache_ent, node);
+
+ cmp = cache_rb_key_cmp(rb_key, cur->rb_key);
+ if (cmp < 0) {
+ /* cur.rb_key > rb_key */
+ smallest = cur;
+ node = node->rb_left;
+ }
+ if (cmp > 0)
+ node = node->rb_right;
+ if (cmp == 0)
+ return &cur->node;
+ }
+
+ return (smallest &&
+ smallest->rb_key.access_mode == rb_key.access_mode &&
+ smallest->rb_key.access_flags == rb_key.access_flags) ?
+ &smallest->node :
+ NULL;
+}
+
static bool mlx5_ent_get_mkey(struct mlx5_cache_ent *ent, struct mlx5_ib_mr *mr)
{
xa_lock_irq(&ent->mkeys);
@@ -655,36 +739,41 @@ static bool mlx5_ent_get_mkey(struct mlx5_cache_ent *ent, struct mlx5_ib_mr *mr)
return true;
}
-static struct mlx5_cache_ent *mkey_cache_ent_from_order(struct mlx5_ib_dev *dev,
- unsigned int order)
-{
- struct mlx5_mkey_cache *cache = &dev->cache;
-
- if (order < cache->ent[0].order)
- return &cache->ent[0];
- order = order - cache->ent[0].order;
- if (order > MKEY_CACHE_LAST_STD_ENTRY)
- return NULL;
- return &cache->ent[order];
-}
-
static bool mlx5_cache_get_mkey(struct mlx5_ib_dev *dev,
struct mlx5r_cache_rb_key rb_key,
struct mlx5_ib_mr *mr)
{
+ struct mlx5_mkey_cache *cache = &dev->cache;
+ unsigned int order, upper_bound;
struct mlx5_cache_ent *ent;
+ struct rb_node *node;
- if (!mlx5r_umr_can_reconfig(dev, 0, rb_key.access_flags))
- return false;
+ order = order_base_2(rb_key.ndescs) > 2 ?
+ order_base_2(rb_key.ndescs) : 2;
+ upper_bound = 1 << order;
- if (rb_key.access_mode == MLX5_MKC_ACCESS_MODE_KSM)
- ent = &dev->cache.ent[MLX5_IMR_KSM_CACHE_ENTRY];
+ /*
+ * Find the smallest node within the range with available mkeys.
+ */
+ mutex_lock(&cache->rb_lock);
+ node = mlx5_cache_find_smallest_ent(cache, rb_key);
+ while (node) {
+ ent = rb_entry(node, struct mlx5_cache_ent, node);
+ if (ent->rb_key.access_mode != rb_key.access_mode ||
+ ent->rb_key.access_flags != rb_key.access_flags ||
+ ent->rb_key.ndescs > upper_bound)
+ break;
- ent = mkey_cache_ent_from_order(dev, order_base_2(rb_key.ndescs));
- if (!ent)
- return false;
+ if (mlx5_ent_get_mkey(ent, mr)) {
+ mutex_unlock(&cache->rb_lock);
+ return true;
+ }
- return mlx5_ent_get_mkey(ent, mr);
+ node = rb_next(node);
+ }
+ mutex_unlock(&cache->rb_lock);
+
+ return false;
}
static int get_uchangeable_access_flags(struct mlx5_ib_dev *dev,
@@ -743,10 +832,8 @@ struct mlx5_ib_mr *mlx5_mr_cache_alloc(struct mlx5_ib_dev *dev, u8 access_mode,
return mr;
}
-static void clean_keys(struct mlx5_ib_dev *dev, int c)
+static void clean_keys(struct mlx5_ib_dev *dev, struct mlx5_cache_ent *ent)
{
- struct mlx5_mkey_cache *cache = &dev->cache;
- struct mlx5_cache_ent *ent = &cache->ent[c];
u32 mkey;
cancel_delayed_work(&ent->dwork);
@@ -765,26 +852,19 @@ static void mlx5_mkey_cache_debugfs_cleanup(struct mlx5_ib_dev *dev)
if (!mlx5_debugfs_root || dev->is_rep)
return;
- debugfs_remove_recursive(dev->cache.root);
- dev->cache.root = NULL;
+ debugfs_remove_recursive(dev->cache.fs_root);
+ dev->cache.fs_root = NULL;
}
-static void mlx5_mkey_cache_debugfs_init(struct mlx5_ib_dev *dev)
+static void mlx5_cache_ent_debugfs_init(struct mlx5_ib_dev *dev,
+ struct mlx5_cache_ent *ent, int order)
{
struct mlx5_mkey_cache *cache = &dev->cache;
- struct mlx5_cache_ent *ent;
struct dentry *dir;
- int i;
- if (!mlx5_debugfs_root || dev->is_rep)
- return;
-
- cache->root = debugfs_create_dir("mr_cache", mlx5_debugfs_get_dev_root(dev->mdev));
-
- for (i = 0; i < MAX_MKEY_CACHE_ENTRIES; i++) {
- ent = &cache->ent[i];
- sprintf(ent->name, "%d", ent->order);
- dir = debugfs_create_dir(ent->name, cache->root);
+ if (cache->fs_root) {
+ sprintf(ent->name, "%d", order);
+ dir = debugfs_create_dir(ent->name, cache->fs_root);
debugfs_create_file("size", 0600, dir, ent, &size_fops);
debugfs_create_file("limit", 0600, dir, ent, &limit_fops);
debugfs_create_ulong("cur", 0400, dir, &ent->stored);
@@ -799,68 +879,114 @@ static void delay_time_func(struct timer_list *t)
WRITE_ONCE(dev->fill_delay, 0);
}
-int mlx5_mkey_cache_init(struct mlx5_ib_dev *dev)
+struct mlx5_cache_ent *mlx5r_cache_create_ent(struct mlx5_ib_dev *dev,
+ struct mlx5r_cache_rb_key rb_key)
+{
+ struct mlx5_cache_ent *ent;
+ int ret;
+
+ ent = kzalloc(sizeof(*ent), GFP_KERNEL);
+ if (!ent)
+ return ERR_PTR(-ENOMEM);
+
+ xa_init_flags(&ent->mkeys, XA_FLAGS_LOCK_IRQ);
+ ent->rb_key = rb_key;
+ ent->dev = dev;
+
+ INIT_DELAYED_WORK(&ent->dwork, delayed_cache_work_func);
+
+ ret = mlx5_cache_ent_insert(&dev->cache, ent);
+ if (ret) {
+ kfree(ent);
+ return ERR_PTR(ret);
+ }
+ return ent;
+}
+
+static int mlx5_cache_init_default_entries(struct mlx5_ib_dev *dev)
{
struct mlx5r_cache_rb_key rb_key = { .access_mode =
MLX5_MKC_ACCESS_MODE_MTT };
struct mlx5_mkey_cache *cache = &dev->cache;
+ bool can_use_cache, need_cache;
struct mlx5_cache_ent *ent;
- int i;
+ int order;
+
+ if (mlx5_debugfs_root && !dev->is_rep)
+ cache->fs_root = debugfs_create_dir(
+ "mr_cache", mlx5_debugfs_get_dev_root(dev->mdev));
+
+ can_use_cache = !dev->is_rep && mlx5r_umr_can_load_pas(dev, 0);
+ need_cache = (dev->mdev->profile.mask & MLX5_PROF_MASK_MR_CACHE) &&
+ mlx5_core_is_pf(dev->mdev);
+
+ for (order = 2; order <= MKEY_CACHE_LAST_STD_ENTRY + 2; order++) {
+ rb_key.ndescs = 1 << order;
+ ent = mlx5r_cache_create_ent(dev, rb_key);
+ if (IS_ERR(ent))
+ return PTR_ERR(ent);
+
+ mlx5_cache_ent_debugfs_init(dev, ent, order);
+
+ if (can_use_cache && need_cache &&
+ order <= mkey_cache_max_order(dev)) {
+ ent->limit =
+ dev->mdev->profile.mr_cache[order - 2].limit;
+ xa_lock_irq(&ent->mkeys);
+ queue_adjust_cache_locked(ent);
+ xa_unlock_irq(&ent->mkeys);
+ }
+ }
+
+ ent = mlx5_odp_init_mkey_cache_entry(dev);
+ if (ent) {
+ if (IS_ERR(ent))
+ return PTR_ERR(ent);
+
+ mlx5_cache_ent_debugfs_init(dev, ent,
+ MLX5_IMR_KSM_CACHE_ENTRY + 2);
+ }
+
+ return 0;
+}
+
+int mlx5_mkey_cache_init(struct mlx5_ib_dev *dev)
+{
+ int err;
mutex_init(&dev->slow_path_mutex);
- cache->wq = alloc_ordered_workqueue("mkey_cache", WQ_MEM_RECLAIM);
- if (!cache->wq) {
+ mutex_init(&dev->cache.rb_lock);
+ dev->cache.rb_root = RB_ROOT;
+ dev->cache.wq = alloc_ordered_workqueue("mkey_cache", WQ_MEM_RECLAIM);
+ if (!dev->cache.wq) {
mlx5_ib_warn(dev, "failed to create work queue\n");
return -ENOMEM;
}
mlx5_cmd_init_async_ctx(dev->mdev, &dev->async_ctx);
timer_setup(&dev->delay_timer, delay_time_func, 0);
- for (i = 0; i < MAX_MKEY_CACHE_ENTRIES; i++) {
- ent = &cache->ent[i];
- xa_init_flags(&ent->mkeys, XA_FLAGS_LOCK_IRQ);
- ent->order = i + 2;
- ent->dev = dev;
- ent->limit = 0;
-
- INIT_DELAYED_WORK(&ent->dwork, delayed_cache_work_func);
-
- if (i > MKEY_CACHE_LAST_STD_ENTRY) {
- mlx5_odp_init_mkey_cache_entry(ent);
- continue;
- }
-
- if (ent->order > mkey_cache_max_order(dev))
- continue;
-
- rb_key.ndescs = 1 << ent->order;
- ent->rb_key = rb_key;
- if ((dev->mdev->profile.mask & MLX5_PROF_MASK_MR_CACHE) &&
- !dev->is_rep && mlx5_core_is_pf(dev->mdev) &&
- mlx5r_umr_can_load_pas(dev, 0))
- ent->limit = dev->mdev->profile.mr_cache[i].limit;
- else
- ent->limit = 0;
- xa_lock_irq(&ent->mkeys);
- queue_adjust_cache_locked(ent);
- xa_unlock_irq(&ent->mkeys);
- }
-
- mlx5_mkey_cache_debugfs_init(dev);
+ err = mlx5_cache_init_default_entries(dev);
+ if (err)
+ goto err;
return 0;
+err:
+ mlx5_mkey_cache_cleanup(dev);
+ return err;
}
int mlx5_mkey_cache_cleanup(struct mlx5_ib_dev *dev)
{
- unsigned int i;
+ struct rb_root *root = &dev->cache.rb_root;
+ struct mlx5_cache_ent *ent;
+ struct rb_node *node;
if (!dev->cache.wq)
return 0;
- for (i = 0; i < MAX_MKEY_CACHE_ENTRIES; i++) {
- struct mlx5_cache_ent *ent = &dev->cache.ent[i];
-
+ mutex_lock(&dev->cache.rb_lock);
+ for (node = rb_first(root); node; node = rb_next(node)) {
+ ent = rb_entry(node, struct mlx5_cache_ent, node);
xa_lock_irq(&ent->mkeys);
ent->disabled = true;
xa_unlock_irq(&ent->mkeys);
@@ -870,8 +996,15 @@ int mlx5_mkey_cache_cleanup(struct mlx5_ib_dev *dev)
mlx5_mkey_cache_debugfs_cleanup(dev);
mlx5_cmd_cleanup_async_ctx(&dev->async_ctx);
- for (i = 0; i < MAX_MKEY_CACHE_ENTRIES; i++)
- clean_keys(dev, i);
+ node = rb_first(root);
+ while (node) {
+ ent = rb_entry(node, struct mlx5_cache_ent, node);
+ node = rb_next(node);
+ clean_keys(dev, ent);
+ rb_erase(&ent->node, root);
+ kfree(ent);
+ }
+ mutex_unlock(&dev->cache.rb_lock);
destroy_workqueue(dev->cache.wq);
del_timer_sync(&dev->delay_timer);
diff --git a/drivers/infiniband/hw/mlx5/odp.c b/drivers/infiniband/hw/mlx5/odp.c
index 90339edddfed..b29ec4e0d8ff 100644
--- a/drivers/infiniband/hw/mlx5/odp.c
+++ b/drivers/infiniband/hw/mlx5/odp.c
@@ -1587,16 +1587,17 @@ mlx5_ib_odp_destroy_eq(struct mlx5_ib_dev *dev, struct mlx5_ib_pf_eq *eq)
return err;
}
-void mlx5_odp_init_mkey_cache_entry(struct mlx5_cache_ent *ent)
+struct mlx5_cache_ent *mlx5_odp_init_mkey_cache_entry(struct mlx5_ib_dev *dev)
{
struct mlx5r_cache_rb_key rb_key = {
.access_mode = MLX5_MKC_ACCESS_MODE_KSM,
.ndescs = mlx5_imr_ksm_entries
};
- if (!(ent->dev->odp_caps.general_caps & IB_ODP_SUPPORT_IMPLICIT))
- return;
- ent->rb_key = rb_key;
+ if (!(dev->odp_caps.general_caps & IB_ODP_SUPPORT_IMPLICIT))
+ return NULL;
+
+ return mlx5r_cache_create_ent(dev, rb_key);
}
static const struct ib_device_ops mlx5_ib_dev_odp_ops = {
--
2.17.2
^ permalink raw reply related [flat|nested] 9+ messages in thread* [PATCH v1 rdma-next 7/8] RDMA/mlx5: Cache all user cacheable mkeys on dereg MR flow
2022-11-07 16:14 [PATCH v1 rdma-next 0/8] RDMA/mlx5: Switch MR cache to use RB-tree Michael Guralnik
` (5 preceding siblings ...)
2022-11-07 16:14 ` [PATCH v1 rdma-next 6/8] RDMA/mlx5: Change the cache structure to an RB-tree Michael Guralnik
@ 2022-11-07 16:14 ` Michael Guralnik
2022-11-07 16:14 ` [PATCH v1 rdma-next 8/8] RDMA/mlx5: Add work to remove temporary entries from the cache Michael Guralnik
7 siblings, 0 replies; 9+ messages in thread
From: Michael Guralnik @ 2022-11-07 16:14 UTC (permalink / raw)
To: jgg, leonro, linux-rdma; +Cc: maorg, aharonl
From: Aharon Landau <aharonl@nvidia.com>
Currently, when dereging an MR, if the mkey doesn't belong to a cache
entry, it will be destroyed.
As a result, the restart of applications with many non-cached mkeys is
not efficient since all the mkeys are destroyed and then recreated.
This process takes a long time (for 100,000 MRs, it is ~20 seconds for
dereg and ~28 seconds for re-reg).
To shorten the restart runtime, insert all cacheable mkeys to the cache.
If there is no fitting entry to the mkey properties, create a temporary
entry that fits it.
After a predetermined timeout, the cache entries will shrink to the
initial high limit.
The mkeys will still be in the cache when consuming them again after an
application restart. Therefore, the registration will be much faster
(for 100,000 MRs, it is ~4 seconds for dereg and ~5 seconds for re-reg).
The temporary cache entries created to store the non-cache mkeys are not
exposed through sysfs like the default cache entries.
Signed-off-by: Aharon Landau <aharonl@nvidia.com>
---
drivers/infiniband/hw/mlx5/mlx5_ib.h | 2 ++
drivers/infiniband/hw/mlx5/mr.c | 48 +++++++++++++++++++++++-----
2 files changed, 42 insertions(+), 8 deletions(-)
diff --git a/drivers/infiniband/hw/mlx5/mlx5_ib.h b/drivers/infiniband/hw/mlx5/mlx5_ib.h
index 0bf2511fdfe4..dafd4c34a968 100644
--- a/drivers/infiniband/hw/mlx5/mlx5_ib.h
+++ b/drivers/infiniband/hw/mlx5/mlx5_ib.h
@@ -629,6 +629,8 @@ struct mlx5_ib_mkey {
unsigned int ndescs;
struct wait_queue_head wait;
refcount_t usecount;
+ /* User Mkey must hold either a cache_key or a cache_ent. */
+ struct mlx5r_cache_rb_key rb_key;
struct mlx5_cache_ent *cache_ent;
};
diff --git a/drivers/infiniband/hw/mlx5/mr.c b/drivers/infiniband/hw/mlx5/mr.c
index df3e551ad7cd..78d0bc10b821 100644
--- a/drivers/infiniband/hw/mlx5/mr.c
+++ b/drivers/infiniband/hw/mlx5/mr.c
@@ -826,6 +826,7 @@ struct mlx5_ib_mr *mlx5_mr_cache_alloc(struct mlx5_ib_dev *dev, u8 access_mode,
return ERR_PTR(err);
}
mr->mmkey.ndescs = ndescs;
+ mr->mmkey.rb_key = rb_key;
}
mr->mmkey.type = MLX5_MKEY_MR;
init_waitqueue_head(&mr->mmkey.wait);
@@ -1738,6 +1739,42 @@ mlx5_free_priv_descs(struct mlx5_ib_mr *mr)
}
}
+static int cache_ent_find_and_store(struct mlx5_ib_dev *dev,
+ struct mlx5_ib_mr *mr)
+{
+ struct mlx5_mkey_cache *cache = &dev->cache;
+ struct mlx5_cache_ent *ent;
+ struct rb_node *node;
+
+ if (mr->mmkey.cache_ent) {
+ xa_lock_irq(&mr->mmkey.cache_ent->mkeys);
+ mr->mmkey.cache_ent->in_use--;
+ xa_unlock_irq(&mr->mmkey.cache_ent->mkeys);
+ goto end;
+ }
+
+ mutex_lock(&cache->rb_lock);
+ node = mlx5_cache_find_smallest_ent(&dev->cache, mr->mmkey.rb_key);
+ mutex_unlock(&cache->rb_lock);
+ if (node) {
+ ent = rb_entry(node, struct mlx5_cache_ent, node);
+ if (ent->rb_key.ndescs == mr->mmkey.rb_key.ndescs) {
+ mr->mmkey.cache_ent = ent;
+ goto end;
+ }
+ }
+
+ ent = mlx5r_cache_create_ent(dev, mr->mmkey.rb_key);
+ if (IS_ERR(ent))
+ return PTR_ERR(ent);
+
+ mr->mmkey.cache_ent = ent;
+
+end:
+ return push_mkey(mr->mmkey.cache_ent, false,
+ xa_mk_value(mr->mmkey.key));
+}
+
int mlx5_ib_dereg_mr(struct ib_mr *ibmr, struct ib_udata *udata)
{
struct mlx5_ib_mr *mr = to_mmr(ibmr);
@@ -1783,16 +1820,11 @@ int mlx5_ib_dereg_mr(struct ib_mr *ibmr, struct ib_udata *udata)
}
/* Stop DMA */
- if (mr->mmkey.cache_ent) {
- xa_lock_irq(&mr->mmkey.cache_ent->mkeys);
- mr->mmkey.cache_ent->in_use--;
- xa_unlock_irq(&mr->mmkey.cache_ent->mkeys);
-
+ if (mr->umem && mlx5r_umr_can_load_pas(dev, mr->umem->length))
if (mlx5r_umr_revoke_mr(mr) ||
- push_mkey(mr->mmkey.cache_ent, false,
- xa_mk_value(mr->mmkey.key)))
+ cache_ent_find_and_store(dev, mr))
mr->mmkey.cache_ent = NULL;
- }
+
if (!mr->mmkey.cache_ent) {
rc = destroy_mkey(to_mdev(mr->ibmr.device), mr);
if (rc)
--
2.17.2
^ permalink raw reply related [flat|nested] 9+ messages in thread* [PATCH v1 rdma-next 8/8] RDMA/mlx5: Add work to remove temporary entries from the cache
2022-11-07 16:14 [PATCH v1 rdma-next 0/8] RDMA/mlx5: Switch MR cache to use RB-tree Michael Guralnik
` (6 preceding siblings ...)
2022-11-07 16:14 ` [PATCH v1 rdma-next 7/8] RDMA/mlx5: Cache all user cacheable mkeys on dereg MR flow Michael Guralnik
@ 2022-11-07 16:14 ` Michael Guralnik
7 siblings, 0 replies; 9+ messages in thread
From: Michael Guralnik @ 2022-11-07 16:14 UTC (permalink / raw)
To: jgg, leonro, linux-rdma; +Cc: maorg, aharonl
From: Aharon Landau <aharonl@nvidia.com>
The non-cache mkeys are stored in the cache only to shorten restarting
application time. Don't store them longer than needed.
Configure cache entries that store non-cache MR as temporary entries.
If 30 seconds have passed and no user reclaimed the temporarily cached
mkeys, an asynchronous work will destroy the mkeys and the temporary
entries.
When allocating an mkey from a temporary entry, don't keep a pointer to
the entry, as it might be destroyed.
Signed-off-by: Aharon Landau <aharonl@nvidia.com>
---
drivers/infiniband/hw/mlx5/mlx5_ib.h | 2 +
drivers/infiniband/hw/mlx5/mr.c | 95 ++++++++++++++++++++++++----
2 files changed, 83 insertions(+), 14 deletions(-)
diff --git a/drivers/infiniband/hw/mlx5/mlx5_ib.h b/drivers/infiniband/hw/mlx5/mlx5_ib.h
index dafd4c34a968..0a72d8e766b8 100644
--- a/drivers/infiniband/hw/mlx5/mlx5_ib.h
+++ b/drivers/infiniband/hw/mlx5/mlx5_ib.h
@@ -749,6 +749,7 @@ struct mlx5_cache_ent {
char name[4];
+ u8 is_tmp:1;
u8 disabled:1;
u8 fill_to_high_water:1;
@@ -782,6 +783,7 @@ struct mlx5_mkey_cache {
struct mutex rb_lock;
struct dentry *fs_root;
unsigned long last_add;
+ struct delayed_work remove_ent_dwork;
};
struct mlx5_ib_port_resources {
diff --git a/drivers/infiniband/hw/mlx5/mr.c b/drivers/infiniband/hw/mlx5/mr.c
index 78d0bc10b821..d920a3f7803c 100644
--- a/drivers/infiniband/hw/mlx5/mr.c
+++ b/drivers/infiniband/hw/mlx5/mr.c
@@ -141,18 +141,16 @@ static void create_mkey_warn(struct mlx5_ib_dev *dev, int status, void *out)
}
-static int push_mkey(struct mlx5_cache_ent *ent, bool limit_pendings,
- void *to_store)
+static int push_mkey_locked(struct mlx5_cache_ent *ent, bool limit_pendings,
+ void *to_store)
{
XA_STATE(xas, &ent->mkeys, 0);
void *curr;
- xa_lock_irq(&ent->mkeys);
if (limit_pendings &&
- (ent->reserved - ent->stored) > MAX_PENDING_REG_MR) {
- xa_unlock_irq(&ent->mkeys);
+ (ent->reserved - ent->stored) > MAX_PENDING_REG_MR)
return -EAGAIN;
- }
+
while (1) {
/*
* This is cmpxchg (NULL, XA_ZERO_ENTRY) however this version
@@ -191,6 +189,7 @@ static int push_mkey(struct mlx5_cache_ent *ent, bool limit_pendings,
break;
xa_lock_irq(&ent->mkeys);
}
+ xa_lock_irq(&ent->mkeys);
if (xas_error(&xas))
return xas_error(&xas);
if (WARN_ON(curr))
@@ -198,6 +197,17 @@ static int push_mkey(struct mlx5_cache_ent *ent, bool limit_pendings,
return 0;
}
+static int push_mkey(struct mlx5_cache_ent *ent, bool limit_pendings,
+ void *to_store)
+{
+ int ret;
+
+ xa_lock_irq(&ent->mkeys);
+ ret = push_mkey_locked(ent, limit_pendings, to_store);
+ xa_unlock_irq(&ent->mkeys);
+ return ret;
+}
+
static void undo_push_reserve_mkey(struct mlx5_cache_ent *ent)
{
void *old;
@@ -542,7 +552,7 @@ static void queue_adjust_cache_locked(struct mlx5_cache_ent *ent)
{
lockdep_assert_held(&ent->mkeys.xa_lock);
- if (ent->disabled || READ_ONCE(ent->dev->fill_delay))
+ if (ent->disabled || READ_ONCE(ent->dev->fill_delay) || ent->is_tmp)
return;
if (ent->stored < ent->limit) {
ent->fill_to_high_water = true;
@@ -732,9 +742,18 @@ static bool mlx5_ent_get_mkey(struct mlx5_cache_ent *ent, struct mlx5_ib_mr *mr)
mr->mmkey.key = pop_stored_mkey(ent);
mr->mmkey.ndescs = ent->rb_key.ndescs;
- mr->mmkey.cache_ent = ent;
- queue_adjust_cache_locked(ent);
- ent->in_use++;
+ if (!ent->is_tmp) {
+ mr->mmkey.cache_ent = ent;
+ queue_adjust_cache_locked(ent);
+ ent->in_use++;
+
+ } else {
+ mr->mmkey.rb_key = ent->rb_key;
+ mod_delayed_work(ent->dev->cache.wq,
+ &ent->dev->cache.remove_ent_dwork,
+ msecs_to_jiffies(30 * 1000));
+ }
+
xa_unlock_irq(&ent->mkeys);
return true;
}
@@ -904,6 +923,38 @@ struct mlx5_cache_ent *mlx5r_cache_create_ent(struct mlx5_ib_dev *dev,
return ent;
}
+static void remove_ent_work_func(struct work_struct *work)
+{
+ struct mlx5_mkey_cache *cache;
+ struct mlx5_cache_ent *ent;
+ struct rb_node *cur;
+
+ cache = container_of(work, struct mlx5_mkey_cache,
+ remove_ent_dwork.work);
+ mutex_lock(&cache->rb_lock);
+ cur = rb_last(&cache->rb_root);
+ while (cur) {
+ ent = rb_entry(cur, struct mlx5_cache_ent, node);
+ cur = rb_prev(cur);
+ mutex_unlock(&cache->rb_lock);
+
+ xa_lock_irq(&ent->mkeys);
+ if (!ent->is_tmp) {
+ xa_unlock_irq(&ent->mkeys);
+ mutex_lock(&cache->rb_lock);
+ continue;
+ }
+ ent->disabled = true;
+ xa_unlock_irq(&ent->mkeys);
+
+ clean_keys(ent->dev, ent);
+ mutex_lock(&cache->rb_lock);
+ rb_erase(&ent->node, &cache->rb_root);
+ kfree(ent);
+ }
+ mutex_unlock(&cache->rb_lock);
+}
+
static int mlx5_cache_init_default_entries(struct mlx5_ib_dev *dev)
{
struct mlx5r_cache_rb_key rb_key = { .access_mode =
@@ -958,6 +1009,7 @@ int mlx5_mkey_cache_init(struct mlx5_ib_dev *dev)
mutex_init(&dev->slow_path_mutex);
mutex_init(&dev->cache.rb_lock);
dev->cache.rb_root = RB_ROOT;
+ INIT_DELAYED_WORK(&dev->cache.remove_ent_dwork, remove_ent_work_func);
dev->cache.wq = alloc_ordered_workqueue("mkey_cache", WQ_MEM_RECLAIM);
if (!dev->cache.wq) {
mlx5_ib_warn(dev, "failed to create work queue\n");
@@ -985,6 +1037,7 @@ int mlx5_mkey_cache_cleanup(struct mlx5_ib_dev *dev)
if (!dev->cache.wq)
return 0;
+ cancel_delayed_work_sync(&dev->cache.remove_ent_dwork);
mutex_lock(&dev->cache.rb_lock);
for (node = rb_first(root); node; node = rb_next(node)) {
ent = rb_entry(node, struct mlx5_cache_ent, node);
@@ -1745,34 +1798,48 @@ static int cache_ent_find_and_store(struct mlx5_ib_dev *dev,
struct mlx5_mkey_cache *cache = &dev->cache;
struct mlx5_cache_ent *ent;
struct rb_node *node;
+ int ret;
if (mr->mmkey.cache_ent) {
xa_lock_irq(&mr->mmkey.cache_ent->mkeys);
mr->mmkey.cache_ent->in_use--;
- xa_unlock_irq(&mr->mmkey.cache_ent->mkeys);
goto end;
}
mutex_lock(&cache->rb_lock);
+ mod_delayed_work(cache->wq, &cache->remove_ent_dwork,
+ msecs_to_jiffies(30 * 1000));
node = mlx5_cache_find_smallest_ent(&dev->cache, mr->mmkey.rb_key);
- mutex_unlock(&cache->rb_lock);
if (node) {
ent = rb_entry(node, struct mlx5_cache_ent, node);
if (ent->rb_key.ndescs == mr->mmkey.rb_key.ndescs) {
+ if (ent->disabled) {
+ mutex_unlock(&cache->rb_lock);
+ return -EOPNOTSUPP;
+ }
+
mr->mmkey.cache_ent = ent;
+ xa_lock_irq(&mr->mmkey.cache_ent->mkeys);
+ mutex_unlock(&cache->rb_lock);
goto end;
}
}
+ mutex_unlock(&cache->rb_lock);
ent = mlx5r_cache_create_ent(dev, mr->mmkey.rb_key);
if (IS_ERR(ent))
return PTR_ERR(ent);
mr->mmkey.cache_ent = ent;
+ xa_lock_irq(&mr->mmkey.cache_ent->mkeys);
+ ent->is_tmp = true;
end:
- return push_mkey(mr->mmkey.cache_ent, false,
- xa_mk_value(mr->mmkey.key));
+ ret = push_mkey_locked(mr->mmkey.cache_ent, false,
+ xa_mk_value(mr->mmkey.key));
+ xa_unlock_irq(&mr->mmkey.cache_ent->mkeys);
+ return ret;
+
}
int mlx5_ib_dereg_mr(struct ib_mr *ibmr, struct ib_udata *udata)
--
2.17.2
^ permalink raw reply related [flat|nested] 9+ messages in thread