Linux RDMA and InfiniBand development
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From: Jason Gunthorpe <jgg@nvidia.com>
To: "Margolin, Michael" <mrgolin@amazon.com>
Cc: leon@kernel.org, linux-rdma@vger.kernel.org, sleybo@amazon.com,
	matua@amazon.com, gal.pressman@linux.dev,
	Anas Mousa <anasmous@amazon.com>,
	Firas Jahjah <firasj@amazon.com>
Subject: Re: [PATCH for-next v3] RDMA/efa: Add EFA query MR support
Date: Tue, 2 Jan 2024 19:47:13 -0400	[thread overview]
Message-ID: <20240102234713.GL50406@nvidia.com> (raw)
In-Reply-To: <c9790d7c-e904-4014-a238-343f376a08b9@amazon.com>

On Wed, Dec 13, 2023 at 07:05:24PM +0200, Margolin, Michael wrote:
> > On Mon, Dec 11, 2023 at 05:47:15PM +0000, Michael Margolin wrote:
> >> diff --git a/drivers/infiniband/hw/efa/efa_admin_cmds_defs.h b/drivers/infiniband/hw/efa/efa_admin_cmds_defs.h
> >> index 9c65bd27bae0..597f7ca6f31d 100644
> >> --- a/drivers/infiniband/hw/efa/efa_admin_cmds_defs.h
> >> +++ b/drivers/infiniband/hw/efa/efa_admin_cmds_defs.h
> >> @@ -415,6 +415,32 @@ struct efa_admin_reg_mr_resp {
> >>        * memory region
> >>        */
> >>       u32 r_key;
> >> +
> >> +     /*
> >> +      * Mask indicating which fields have valid values
> >> +      * 0 : recv_pci_bus_id
> >> +      * 1 : rdma_read_pci_bus_id
> >> +      * 2 : rdma_recv_pci_bus_id
> >> +      */
> >> +     u8 validity;
> >> +
> >> +     /*
> >> +      * Physical PCIe bus used by the device to reach the MR for receive
> >> +      * operation
> >> +      */
> >> +     u8 recv_pci_bus_id;
> >> +
> >> +     /*
> >> +      * Physical PCIe bus used by the device to reach the MR for RDMA read
> >> +      * operation
> >> +      */
> >> +     u8 rdma_read_pci_bus_id;
> >> +
> >> +     /*
> >> +      * Physical PCIe bus used by the device to reach the MR for RDMA write
> >> +      * receive
> >> +      */
> >> +     u8 rdma_recv_pci_bus_id;
> > What driver is bound to this other PCIe bus and how did the iommu get
> > setup for it?
> 
> It's internal bus that is not directly exposed to the host. Addresses
> mapping is acquired from accelerator's driver as for any MR residing in
> accelerator memory, and the translation is owned by devices on that bus.

So if it isn't visible to the host, or connectable to anything Linux
would call a PCI RID, why are you giving it such specific names? Just
call it 'interconnect path id' or something and make it opaque?

Jason

  parent reply	other threads:[~2024-01-02 23:47 UTC|newest]

Thread overview: 9+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-12-11 17:47 [PATCH for-next v3] RDMA/efa: Add EFA query MR support Michael Margolin
2023-12-11 17:50 ` Jason Gunthorpe
2023-12-13 17:05   ` Margolin, Michael
2023-12-21 13:45     ` Margolin, Michael
2023-12-25 11:26       ` Leon Romanovsky
2024-01-02 23:47     ` Jason Gunthorpe [this message]
2024-01-03 13:33       ` Margolin, Michael
2024-01-03 13:37         ` Jason Gunthorpe
2024-01-04  9:50           ` Margolin, Michael

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