Re: [PATCH for-next 1/4] RDMA/bnxt_re: Add support for optimized modify QP

[kernel test robot <lkp@intel.com>]

Hi Selvin,

kernel test robot noticed the following build warnings:

[auto build test WARNING on rdma/for-next]
[also build test WARNING on linus/master v6.12-rc3 next-20241014]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch#_base_tree_information]

url:    https://github.com/intel-lab-lkp/linux/commits/Selvin-Xavier/RDMA-bnxt_re-Add-support-for-optimized-modify-QP/20241011-133536
base:   https://git.kernel.org/pub/scm/linux/kernel/git/rdma/rdma.git for-next
patch link:    https://lore.kernel.org/r/1728623035-30657-2-git-send-email-selvin.xavier%40broadcom.com
patch subject: [PATCH for-next 1/4] RDMA/bnxt_re: Add support for optimized modify QP
config: x86_64-randconfig-123-20241014 (https://download.01.org/0day-ci/archive/20241014/202410142256.J3j7bGkA-lkp@intel.com/config)
compiler: gcc-11 (Debian 11.3.0-12) 11.3.0
reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20241014/202410142256.J3j7bGkA-lkp@intel.com/reproduce)

If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp@intel.com>
| Closes: https://lore.kernel.org/oe-kbuild-all/202410142256.J3j7bGkA-lkp@intel.com/

sparse warnings: (new ones prefixed by >>)
>> drivers/infiniband/hw/bnxt_re/qplib_rcfw.c:910:23: sparse: sparse: invalid assignment: |=
   drivers/infiniband/hw/bnxt_re/qplib_rcfw.c:910:23: sparse:    left side has type unsigned short
   drivers/infiniband/hw/bnxt_re/qplib_rcfw.c:910:23: sparse:    right side has type restricted __le16
--
>> drivers/infiniband/hw/bnxt_re/qplib_fp.c:1291:36: sparse: sparse: incorrect type in assignment (different base types) @@     expected restricted __le16 [usertype] flags @@     got unsigned long @@
   drivers/infiniband/hw/bnxt_re/qplib_fp.c:1291:36: sparse:     expected restricted __le16 [usertype] flags
   drivers/infiniband/hw/bnxt_re/qplib_fp.c:1291:36: sparse:     got unsigned long
   drivers/infiniband/hw/bnxt_re/qplib_fp.c: note: in included file (through include/linux/smp.h, include/linux/alloc_tag.h, include/linux/percpu.h, ...):
   include/linux/list.h:83:21: sparse: sparse: self-comparison always evaluates to true
   include/linux/list.h:83:21: sparse: sparse: self-comparison always evaluates to true

vim +910 drivers/infiniband/hw/bnxt_re/qplib_rcfw.c

   828	
   829	int bnxt_qplib_init_rcfw(struct bnxt_qplib_rcfw *rcfw,
   830				 struct bnxt_qplib_ctx *ctx, int is_virtfn)
   831	{
   832		struct creq_initialize_fw_resp resp = {};
   833		struct cmdq_initialize_fw req = {};
   834		struct bnxt_qplib_cmdqmsg msg = {};
   835		u16 flags = 0;
   836		u8 pgsz, lvl;
   837		int rc;
   838	
   839		bnxt_qplib_rcfw_cmd_prep((struct cmdq_base *)&req,
   840					 CMDQ_BASE_OPCODE_INITIALIZE_FW,
   841					 sizeof(req));
   842		/* Supply (log-base-2-of-host-page-size - base-page-shift)
   843		 * to bono to adjust the doorbell page sizes.
   844		 */
   845		req.log2_dbr_pg_size = cpu_to_le16(PAGE_SHIFT -
   846						   RCFW_DBR_BASE_PAGE_SHIFT);
   847		/*
   848		 * Gen P5 devices doesn't require this allocation
   849		 * as the L2 driver does the same for RoCE also.
   850		 * Also, VFs need not setup the HW context area, PF
   851		 * shall setup this area for VF. Skipping the
   852		 * HW programming
   853		 */
   854		if (is_virtfn)
   855			goto skip_ctx_setup;
   856		if (bnxt_qplib_is_chip_gen_p5_p7(rcfw->res->cctx))
   857			goto config_vf_res;
   858	
   859		lvl = ctx->qpc_tbl.level;
   860		pgsz = bnxt_qplib_base_pg_size(&ctx->qpc_tbl);
   861		req.qpc_pg_size_qpc_lvl = (pgsz << CMDQ_INITIALIZE_FW_QPC_PG_SIZE_SFT) |
   862					   lvl;
   863		lvl = ctx->mrw_tbl.level;
   864		pgsz = bnxt_qplib_base_pg_size(&ctx->mrw_tbl);
   865		req.mrw_pg_size_mrw_lvl = (pgsz << CMDQ_INITIALIZE_FW_QPC_PG_SIZE_SFT) |
   866					   lvl;
   867		lvl = ctx->srqc_tbl.level;
   868		pgsz = bnxt_qplib_base_pg_size(&ctx->srqc_tbl);
   869		req.srq_pg_size_srq_lvl = (pgsz << CMDQ_INITIALIZE_FW_QPC_PG_SIZE_SFT) |
   870					   lvl;
   871		lvl = ctx->cq_tbl.level;
   872		pgsz = bnxt_qplib_base_pg_size(&ctx->cq_tbl);
   873		req.cq_pg_size_cq_lvl = (pgsz << CMDQ_INITIALIZE_FW_QPC_PG_SIZE_SFT) |
   874					 lvl;
   875		lvl = ctx->tim_tbl.level;
   876		pgsz = bnxt_qplib_base_pg_size(&ctx->tim_tbl);
   877		req.tim_pg_size_tim_lvl = (pgsz << CMDQ_INITIALIZE_FW_QPC_PG_SIZE_SFT) |
   878					   lvl;
   879		lvl = ctx->tqm_ctx.pde.level;
   880		pgsz = bnxt_qplib_base_pg_size(&ctx->tqm_ctx.pde);
   881		req.tqm_pg_size_tqm_lvl = (pgsz << CMDQ_INITIALIZE_FW_QPC_PG_SIZE_SFT) |
   882					   lvl;
   883		req.qpc_page_dir =
   884			cpu_to_le64(ctx->qpc_tbl.pbl[PBL_LVL_0].pg_map_arr[0]);
   885		req.mrw_page_dir =
   886			cpu_to_le64(ctx->mrw_tbl.pbl[PBL_LVL_0].pg_map_arr[0]);
   887		req.srq_page_dir =
   888			cpu_to_le64(ctx->srqc_tbl.pbl[PBL_LVL_0].pg_map_arr[0]);
   889		req.cq_page_dir =
   890			cpu_to_le64(ctx->cq_tbl.pbl[PBL_LVL_0].pg_map_arr[0]);
   891		req.tim_page_dir =
   892			cpu_to_le64(ctx->tim_tbl.pbl[PBL_LVL_0].pg_map_arr[0]);
   893		req.tqm_page_dir =
   894			cpu_to_le64(ctx->tqm_ctx.pde.pbl[PBL_LVL_0].pg_map_arr[0]);
   895	
   896		req.number_of_qp = cpu_to_le32(ctx->qpc_tbl.max_elements);
   897		req.number_of_mrw = cpu_to_le32(ctx->mrw_tbl.max_elements);
   898		req.number_of_srq = cpu_to_le32(ctx->srqc_tbl.max_elements);
   899		req.number_of_cq = cpu_to_le32(ctx->cq_tbl.max_elements);
   900	
   901	config_vf_res:
   902		req.max_qp_per_vf = cpu_to_le32(ctx->vf_res.max_qp_per_vf);
   903		req.max_mrw_per_vf = cpu_to_le32(ctx->vf_res.max_mrw_per_vf);
   904		req.max_srq_per_vf = cpu_to_le32(ctx->vf_res.max_srq_per_vf);
   905		req.max_cq_per_vf = cpu_to_le32(ctx->vf_res.max_cq_per_vf);
   906		req.max_gid_per_vf = cpu_to_le32(ctx->vf_res.max_gid_per_vf);
   907	
   908	skip_ctx_setup:
   909		if (BNXT_RE_HW_RETX(rcfw->res->dattr->dev_cap_flags))
 > 910			flags |= cpu_to_le16(CMDQ_INITIALIZE_FW_FLAGS_HW_REQUESTER_RETX_SUPPORTED);
   911		if (_is_optimize_modify_qp_supported(rcfw->res->dattr->dev_cap_flags2))
   912			flags |= CMDQ_INITIALIZE_FW_FLAGS_OPTIMIZE_MODIFY_QP_SUPPORTED;
   913		req.flags |= cpu_to_le16(flags);
   914		req.stat_ctx_id = cpu_to_le32(ctx->stats.fw_id);
   915		bnxt_qplib_fill_cmdqmsg(&msg, &req, &resp, NULL, sizeof(req), sizeof(resp), 0);
   916		rc = bnxt_qplib_rcfw_send_message(rcfw, &msg);
   917		if (rc)
   918			return rc;
   919		set_bit(FIRMWARE_INITIALIZED_FLAG, &rcfw->cmdq.flags);
   920		return 0;
   921	}
   922	

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