From: Tariq Toukan <tariqt@nvidia.com>
To: Saeed Mahameed <saeedm@nvidia.com>,
Leon Romanovsky <leonro@nvidia.com>,
Jason Gunthorpe <jgg@nvidia.com>
Cc: <netdev@vger.kernel.org>, <linux-rdma@vger.kernel.org>,
Jakub Kicinski <kuba@kernel.org>, Gal Pressman <gal@nvidia.com>,
Mark Bloch <mbloch@nvidia.com>, Moshe Shemesh <moshe@nvidia.com>,
Jianbo Liu <jianbol@nvidia.com>, Tariq Toukan <tariqt@nvidia.com>
Subject: [PATCH mlx5-next 1/4] net/mlx5: Update mlx5_ifc to support FEC for 200G per lane link modes
Date: Thu, 9 Jan 2025 22:42:28 +0200 [thread overview]
Message-ID: <20250109204231.1809851-2-tariqt@nvidia.com> (raw)
In-Reply-To: <20250109204231.1809851-1-tariqt@nvidia.com>
From: Jianbo Liu <jianbol@nvidia.com>
Add FEC admin and override related fields in PPLM, and the bit in PCAM
to indicate those fields are supported.
Signed-off-by: Jianbo Liu <jianbol@nvidia.com>
Signed-off-by: Tariq Toukan <tariqt@nvidia.com>
---
include/linux/mlx5/mlx5_ifc.h | 20 ++++++++++++++++++--
1 file changed, 18 insertions(+), 2 deletions(-)
diff --git a/include/linux/mlx5/mlx5_ifc.h b/include/linux/mlx5/mlx5_ifc.h
index 43b3cb4bf8d1..c3da1581853c 100644
--- a/include/linux/mlx5/mlx5_ifc.h
+++ b/include/linux/mlx5/mlx5_ifc.h
@@ -10150,7 +10150,21 @@ struct mlx5_ifc_pplm_reg_bits {
u8 fec_override_admin_200g_2x[0x10];
u8 fec_override_admin_100g_1x[0x10];
- u8 reserved_at_260[0x20];
+ u8 reserved_at_260[0x60];
+
+ u8 fec_override_cap_1600g_8x[0x10];
+ u8 fec_override_cap_800g_4x[0x10];
+
+ u8 fec_override_cap_400g_2x[0x10];
+ u8 fec_override_cap_200g_1x[0x10];
+
+ u8 fec_override_admin_1600g_8x[0x10];
+ u8 fec_override_admin_800g_4x[0x10];
+
+ u8 fec_override_admin_400g_2x[0x10];
+ u8 fec_override_admin_200g_1x[0x10];
+
+ u8 reserved_at_340[0x80];
};
struct mlx5_ifc_ppcnt_reg_bits {
@@ -10524,7 +10538,9 @@ struct mlx5_ifc_mtutc_reg_bits {
};
struct mlx5_ifc_pcam_enhanced_features_bits {
- u8 reserved_at_0[0x48];
+ u8 reserved_at_0[0x1d];
+ u8 fec_200G_per_lane_in_pplm[0x1];
+ u8 reserved_at_1e[0x2a];
u8 fec_100G_per_lane_in_pplm[0x1];
u8 reserved_at_49[0x1f];
u8 fec_50G_per_lane_in_pplm[0x1];
--
2.45.0
next prev parent reply other threads:[~2025-01-09 20:43 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-01-09 20:42 [PATCH mlx5-next 0/4] mlx5-next updates 2025-01-09 Tariq Toukan
2025-01-09 20:42 ` Tariq Toukan [this message]
2025-01-10 1:15 ` [PATCH mlx5-next 1/4] net/mlx5: Update mlx5_ifc to support FEC for 200G per lane link modes Jacob Keller
2025-01-10 3:55 ` Kalesh Anakkur Purayil
2025-01-09 20:42 ` [PATCH mlx5-next 2/4] net/mlx5: Add support for MRTCQ register Tariq Toukan
2025-01-10 1:17 ` Jacob Keller
2025-01-10 3:55 ` Kalesh Anakkur Purayil
2025-01-09 20:42 ` [PATCH mlx5-next 3/4] net/mlx5: SHAMPO: Introduce new SHAMPO specific HCA caps Tariq Toukan
2025-01-10 1:17 ` Jacob Keller
2025-01-10 3:56 ` Kalesh Anakkur Purayil
2025-01-09 20:42 ` [PATCH mlx5-next 4/4] net/mlx5: Add nic_cap_reg and vhca_icm_ctrl registers Tariq Toukan
2025-01-10 1:18 ` Jacob Keller
2025-01-10 3:57 ` Kalesh Anakkur Purayil
2025-01-12 8:58 ` [PATCH mlx5-next 0/4] mlx5-next updates 2025-01-09 Leon Romanovsky
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