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From: Ratheesh Kannoth <rkannoth@marvell.com>
To: <intel-wired-lan@lists.osuosl.org>,
	<linux-kernel@vger.kernel.org>, <linux-rdma@vger.kernel.org>,
	<netdev@vger.kernel.org>, <oss-drivers@corigine.com>
Cc: <akiyano@amazon.com>, <andrew+netdev@lunn.ch>,
	<anthony.l.nguyen@intel.com>, <arkadiusz.kubalewski@intel.com>,
	<brett.creeley@amd.com>, <darinzon@amazon.com>,
	<davem@davemloft.net>, <donald.hunter@gmail.com>,
	<edumazet@google.com>, <horms@kernel.org>, <idosch@nvidia.com>,
	<ivecera@redhat.com>, <jiri@resnulli.us>, <kuba@kernel.org>,
	<leon@kernel.org>, <mbloch@nvidia.com>,
	<michael.chan@broadcom.com>, <pabeni@redhat.com>,
	<pavan.chebbi@broadcom.com>, <petrm@nvidia.com>,
	<Prathosh.Satish@microchip.com>, <przemyslaw.kitszel@intel.com>,
	<saeedm@nvidia.com>, <sgoutham@marvell.com>, <tariqt@nvidia.com>,
	<vadim.fedorenko@linux.dev>,
	Ratheesh Kannoth <rkannoth@marvell.com>
Subject: [PATCH v12 net-next 2/9] net/mlx5e: trim stack use in PCIe congestion threshold helper
Date: Fri, 8 May 2026 09:19:05 +0530	[thread overview]
Message-ID: <20260508034912.4082520-3-rkannoth@marvell.com> (raw)
In-Reply-To: <20260508034912.4082520-1-rkannoth@marvell.com>

union devlink_param_value grew when U64 array parameters were added.
Keeping a four-element array of that union in
mlx5e_pcie_cong_get_thresh_config() inflated the stack frame past the
-Wframe-larger-than limit.

Read each driverinit value into a single reused union, then store the
four u16 thresholds in struct mlx5e_pcie_cong_thresh field order via a
temporary u16 pointer to config.

Signed-off-by: Ratheesh Kannoth <rkannoth@marvell.com>
---
 .../mellanox/mlx5/core/en/pcie_cong_event.c   | 34 +++++++++++--------
 1 file changed, 19 insertions(+), 15 deletions(-)

diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en/pcie_cong_event.c b/drivers/net/ethernet/mellanox/mlx5/core/en/pcie_cong_event.c
index 2eb666a46f39..88e76be3a73d 100644
--- a/drivers/net/ethernet/mellanox/mlx5/core/en/pcie_cong_event.c
+++ b/drivers/net/ethernet/mellanox/mlx5/core/en/pcie_cong_event.c
@@ -252,28 +252,32 @@ static int
 mlx5e_pcie_cong_get_thresh_config(struct mlx5_core_dev *dev,
 				  struct mlx5e_pcie_cong_thresh *config)
 {
+	enum {
+		INBOUND_HIGH,
+		INBOUND_LOW,
+		OUTBOUND_HIGH,
+		OUTBOUND_LOW,
+	};
+
 	u32 ids[4] = {
-		MLX5_DEVLINK_PARAM_ID_PCIE_CONG_IN_LOW,
-		MLX5_DEVLINK_PARAM_ID_PCIE_CONG_IN_HIGH,
-		MLX5_DEVLINK_PARAM_ID_PCIE_CONG_OUT_LOW,
-		MLX5_DEVLINK_PARAM_ID_PCIE_CONG_OUT_HIGH,
+		[INBOUND_LOW] = MLX5_DEVLINK_PARAM_ID_PCIE_CONG_IN_LOW,
+		[INBOUND_HIGH] = MLX5_DEVLINK_PARAM_ID_PCIE_CONG_IN_HIGH,
+		[OUTBOUND_LOW] = MLX5_DEVLINK_PARAM_ID_PCIE_CONG_OUT_LOW,
+		[OUTBOUND_HIGH] = MLX5_DEVLINK_PARAM_ID_PCIE_CONG_OUT_HIGH,
 	};
-	struct devlink *devlink = priv_to_devlink(dev);
-	union devlink_param_value val[4];
 
-	for (int i = 0; i < 4; i++) {
-		u32 id = ids[i];
-		int err;
+	struct devlink *devlink = priv_to_devlink(dev);
+	union devlink_param_value val;
+	u16 *dst = (u16 *)config;
+	int err;
 
-		err = devl_param_driverinit_value_get(devlink, id, &val[i]);
+	for (int i = 0; i < ARRAY_SIZE(ids); i++) {
+		err = devl_param_driverinit_value_get(devlink, ids[i], &val);
 		if (err)
 			return err;
-	}
 
-	config->inbound_low = val[0].vu16;
-	config->inbound_high = val[1].vu16;
-	config->outbound_low = val[2].vu16;
-	config->outbound_high = val[3].vu16;
+		dst[i] = val.vu16;
+	}
 
 	return 0;
 }
-- 
2.43.0


  parent reply	other threads:[~2026-05-08  3:50 UTC|newest]

Thread overview: 19+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-05-08  3:49 [PATCH v12 net-next 0/9] octeontx2-af: npc: Enhancements Ratheesh Kannoth
2026-05-08  3:49 ` [PATCH v12 net-next 1/9] octeontx2-af: npc: cn20k: debugfs enhancements Ratheesh Kannoth
2026-05-11  2:25   ` Ratheesh Kannoth
2026-05-08  3:49 ` Ratheesh Kannoth [this message]
2026-05-08  9:02   ` [PATCH v12 net-next 2/9] net/mlx5e: trim stack use in PCIe congestion threshold helper David Laight
2026-05-08  3:49 ` [PATCH v12 net-next 3/9] devlink: pass param values by pointer Ratheesh Kannoth
2026-05-08  3:49 ` [PATCH v12 net-next 4/9] devlink: Implement devlink param multi attribute nested data values Ratheesh Kannoth
2026-05-11  2:31   ` Ratheesh Kannoth
2026-05-08  3:49 ` [PATCH v12 net-next 5/9] octeontx2-af: npc: cn20k: add subbank search order control Ratheesh Kannoth
2026-05-11  2:32   ` Ratheesh Kannoth
2026-05-08  3:49 ` [PATCH v12 net-next 6/9] octeontx2: cn20k: Coordinate default rules with NIX LF lifecycle Ratheesh Kannoth
2026-05-11  2:44   ` Ratheesh Kannoth
2026-05-08  3:49 ` [PATCH v12 net-next 7/9] octeontx2-af: npc: Support for custom KPU profile from filesystem Ratheesh Kannoth
2026-05-11  3:23   ` Ratheesh Kannoth
2026-05-11  3:27   ` Ratheesh Kannoth
2026-05-08  3:49 ` [PATCH v12 net-next 8/9] octeontx2: cn20k: Respect NPC MCAM X2/X4 profile in flows and DFT alloc Ratheesh Kannoth
2026-05-11  3:25   ` Ratheesh Kannoth
2026-05-08  3:49 ` [PATCH v12 net-next 9/9] octeontx2-af: npc: cn20k: Allocate npc_priv and dstats dynamically Ratheesh Kannoth
2026-05-11  3:26   ` Ratheesh Kannoth

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