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Sun, 31 May 2026 04:40:15 -0700 From: Tariq Toukan To: Eric Dumazet , Jakub Kicinski , Paolo Abeni , Andrew Lunn , "David S. Miller" CC: Saeed Mahameed , Leon Romanovsky , Tariq Toukan , Mark Bloch , Nimrod Oren , Yael Chemla , Shay Drory , Or Har-Toov , Edward Srouji , Simon Horman , Maher Sanalla , Parav Pandit , Kees Cook , Patrisious Haddad , Moshe Shemesh , , , , Gal Pressman , Jacob Keller Subject: [PATCH net-next V2 03/13] net/mlx5: E-Switch, move devcom init from TC to eswitch layer Date: Sun, 31 May 2026 14:39:43 +0300 Message-ID: <20260531113954.395443-4-tariqt@nvidia.com> X-Mailer: git-send-email 2.44.0 In-Reply-To: <20260531113954.395443-1-tariqt@nvidia.com> References: <20260531113954.395443-1-tariqt@nvidia.com> Precedence: bulk X-Mailing-List: linux-rdma@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-NV-OnPremToCloud: ExternallySecured X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BL6PEPF0001AB4C:EE_|MN2PR12MB4344:EE_ X-MS-Office365-Filtering-Correlation-Id: 05979410-c050-479e-0670-08debf096fa9 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|376014|7416014|36860700016|1800799024|82310400026|22082099003|18002099003|6133799003|11063799006|56012099006; X-Microsoft-Antispam-Message-Info: lByrjGswkVFyJNZhqc8IUK1WN981FYyjZ9TVuAdrZqzK4t4R8w9584AA3a50rJE8ZJrmBC9WnDqKrGEAVgd6FQk12jvq5BceqJKcagWqb1/5imBC7wJEMD/7l4IB+DO+ejLWrTlBh79RESlhkLuJsApUCzz7Olud3zbiDOOA+MGx1z12/aq8MZNKHNQmfjn6ULOqASIedvaxouAabcNDSbe2JmY1YLZxWpeENCXWZHw2Ur/dZRHr5LD5WJGRMlMnSzCn8OD8BUi5IfpY8JYA1WEEwFiKYfBNfiFXv6uPSQS4obGlu9EbqNvdgZ7UAaSvxSqFCGXR80TLfvago0Tfp6cLVf9Q+57JXr6xKSAhuLlW6ev6FgKz1KugUamNCgeBJrVCwYToJY2fRKXM+pvrJVaA1yTZQVz3V/OwWgZfj9T90ORBZu1JHi2//8iZijSUvhSWglwuvfZ6Gk9oBjk2Vbqhp0QkjmFD01oOxhe4Ax2QA1GboLhZ2hWzhPo6hzoRvA84d0s6kFrEv8JKWRfZbMj6J2qLZEMYTYL8A+SqnWSIDyhtrPcS8eOvHWf4umjkYHWRQTnZp7lS7SBR7QknU4pQMohMZwWofOS/D2Iw/hkdtSY4nWrN1v9IwQqIcveycOGH7nTpR4vfC3omRG1KfmEywkz38p8275Qtqj3RdR7OkAmbAehoKOud3sUHeTu470I6YxPS5ho6id1KPo3tT8c6skwiLgs4acT1knUbE0g= X-Forefront-Antispam-Report: CIP:216.228.118.232;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:dc7edge1.nvidia.com;CAT:NONE;SFS:(13230040)(376014)(7416014)(36860700016)(1800799024)(82310400026)(22082099003)(18002099003)(6133799003)(11063799006)(56012099006);DIR:OUT;SFP:1101; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: gFE/jfwi1YH8Eay3zDnChepYuV/pTsVEpXOTTveW7V88VOjU0+O06oVL6+bYLW++3lrTyNxGkDmcjepk1XfCYWxCOvD/DLHaJuaN52hUIk5A7VJrJxkqPuirHwccY9sxS21J6mwuU8JHmqVwN3M4Wd09O7GW83ybduzVSI/JPdlz32FSE7+CCOr8FMPH3Vq7x0Ycdvb4pF6PxRhUHZou07p7QxEFM7GY82ZTcEPBm4q6AGCN9qj9io8yo1JhaGvMDg6xbE9kTDeO6+YkByTlJdyLR6ZJdWwB/eoitSfnpDxsGAPzY95rp6tf7sbSNrH0Bx6wrMV4+nJOHrDsTgVfBVhB730zGkuLYnqHqz6Ym/JF88ddMZBYI1/mhYaRmiGyc2wwBg9PLAANGIgP7fS8klmvjd52NngE6wZmGP7+2Re+7mkEtwex48r9DYz6Ie7v X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 31 May 2026 11:40:38.0410 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 05979410-c050-479e-0670-08debf096fa9 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.118.232];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: BL6PEPF0001AB4C.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: MN2PR12MB4344 From: Shay Drory Move the E-swtich devcom component management from TC layer to ESW layer. This refactoring places devcom lifecycle management at the appropriate layer and prepares for SD LAG which needs devcom registration independent of the TC/representor initialization. Signed-off-by: Shay Drory Reviewed-by: Mark Bloch Signed-off-by: Tariq Toukan --- .../net/ethernet/mellanox/mlx5/core/en_tc.c | 20 ------------------- .../mellanox/mlx5/core/eswitch_offloads.c | 6 ++++++ 2 files changed, 6 insertions(+), 20 deletions(-) diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en_tc.c b/drivers/net/ethernet/mellanox/mlx5/core/en_tc.c index a9001d1c902f..3846c16c3138 100644 --- a/drivers/net/ethernet/mellanox/mlx5/core/en_tc.c +++ b/drivers/net/ethernet/mellanox/mlx5/core/en_tc.c @@ -5394,8 +5394,6 @@ int mlx5e_tc_esw_init(struct mlx5_rep_uplink_priv *uplink_priv) { const size_t sz_enc_opts = sizeof(struct tunnel_match_enc_opts); u8 mapping_id[MLX5_SW_IMAGE_GUID_MAX_BYTES]; - struct mlx5_devcom_match_attr attr = {}; - struct netdev_phys_item_id ppid; struct mlx5e_rep_priv *rpriv; struct mapping_ctx *mapping; struct mlx5_eswitch *esw; @@ -5456,14 +5454,6 @@ int mlx5e_tc_esw_init(struct mlx5_rep_uplink_priv *uplink_priv) goto err_action_counter; } - err = netif_get_port_parent_id(priv->netdev, &ppid, false); - if (!err) { - memcpy(&attr.key.buf, &ppid.id, ppid.id_len); - attr.flags = MLX5_DEVCOM_MATCH_FLAGS_NS; - attr.net = mlx5_core_net(esw->dev); - mlx5_esw_offloads_devcom_init(esw, &attr); - } - return 0; err_action_counter: @@ -5484,16 +5474,6 @@ int mlx5e_tc_esw_init(struct mlx5_rep_uplink_priv *uplink_priv) void mlx5e_tc_esw_cleanup(struct mlx5_rep_uplink_priv *uplink_priv) { - struct mlx5e_rep_priv *rpriv; - struct mlx5_eswitch *esw; - struct mlx5e_priv *priv; - - rpriv = container_of(uplink_priv, struct mlx5e_rep_priv, uplink_priv); - priv = netdev_priv(rpriv->netdev); - esw = priv->mdev->priv.eswitch; - - mlx5_esw_offloads_devcom_cleanup(esw); - mlx5e_tc_tun_cleanup(uplink_priv->encap); mapping_destroy(uplink_priv->tunnel_enc_opts_mapping); diff --git a/drivers/net/ethernet/mellanox/mlx5/core/eswitch_offloads.c b/drivers/net/ethernet/mellanox/mlx5/core/eswitch_offloads.c index 189be11c4c39..d9683d3ea0e7 100644 --- a/drivers/net/ethernet/mellanox/mlx5/core/eswitch_offloads.c +++ b/drivers/net/ethernet/mellanox/mlx5/core/eswitch_offloads.c @@ -3866,6 +3866,7 @@ bool mlx5_esw_offloads_controller_valid(const struct mlx5_eswitch *esw, u32 cont int esw_offloads_enable(struct mlx5_eswitch *esw) { u8 mapping_id[MLX5_SW_IMAGE_GUID_MAX_BYTES]; + struct mlx5_devcom_match_attr attr = {}; struct mapping_ctx *reg_c0_obj_pool; struct mlx5_vport *vport; unsigned long i; @@ -3926,6 +3927,10 @@ int esw_offloads_enable(struct mlx5_eswitch *esw) if (err) goto err_vports; + memcpy(attr.key.buf, mapping_id, id_len); + attr.flags = MLX5_DEVCOM_MATCH_FLAGS_NS; + attr.net = mlx5_core_net(esw->dev); + mlx5_esw_offloads_devcom_init(esw, &attr); return 0; err_vports: @@ -3970,6 +3975,7 @@ static int esw_offloads_stop(struct mlx5_eswitch *esw, void esw_offloads_disable(struct mlx5_eswitch *esw) { + mlx5_esw_offloads_devcom_cleanup(esw); mlx5_eswitch_disable_pf_vf_vports(esw); mlx5_esw_offloads_rep_unload(esw, MLX5_VPORT_UPLINK); esw_set_passing_vport_metadata(esw, false); -- 2.44.0