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Wed, 2 Sep 2026 09:47:19 -0700 From: Tariq Toukan To: Andrew Lunn , "David S. Miller" , Eric Dumazet , Jakub Kicinski , , Paolo Abeni CC: Dragos Tatulea , Eran Ben Elisha , Gal Pressman , Jianbo Liu , "Leon Romanovsky" , , , Mark Bloch , Moshe Shemesh , Saeed Mahameed , Shahar Shitrit , Tariq Toukan , Yael Chemla Subject: [PATCH net 3/3] net/mlx5e: Fix reporting support for all RS FEC variants Date: Wed, 2 Sep 2026 19:46:34 +0300 Message-ID: <20260902164634.3657606-4-tariqt@nvidia.com> X-Mailer: git-send-email 2.44.0 In-Reply-To: <20260902164634.3657606-1-tariqt@nvidia.com> References: <20260902164634.3657606-1-tariqt@nvidia.com> Precedence: bulk X-Mailing-List: linux-rdma@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-NV-OnPremToCloud: ExternallySecured X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BN7PEPF00000093:EE_|CH0PR12MB8578:EE_ X-MS-Office365-Filtering-Correlation-Id: 1ff1265c-f255-49f9-5655-08df0911ee51 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|36860700016|1800799024|376014|82310400026|23010399003|10067099003|56012099006|11063799006|22082099003|18002099003; X-Microsoft-Antispam-Message-Info: fBrzqR4iEZsLyqTybNCsV+mtg3wilQBPMAsH51Cbins8Rgjo9NbEXNVJaRxXQsOp2/tgbz8EuunBiEZHo8O1aMDAuuaFSLHFZZ9f+ptBSuUCf72eS6Hv64zJQZMUO2wzRDPmLhoNFlZCpy5aNuXBeHHJ9eEaUatXwj8vap7wTWb82ZpTKnzMfr+xlKVEcuyyAEprr7D+vsWqzPuCofgf5yAlatPmRTc9dZyht3qYUUykD7rxPgF1m19yk0nHjO+fNZmRnmhhAG/AsYswG5/9q/0NhIZ3JmCYw79SGK5SMa1SVH23A7RLbJgqYWY6dpPpxqzIoCC6v8xzxiGxmRylob/lAsM/ZyTSQIbJ75zVCwHakMZdqZDIPWmrU7pZu6Efd9mxQ8mzMxioBXMRnykXux6DqEC2zPGstgCqK5PqM7CDONJjizzAdQiaxNqlOFRhHg9YELL821qvQFCJMoTaI7Z9fI3J6BM/UuMQG9Qf67w43H4ssQ8UcNuyb4aucaEcpXL/noEO4ISSnGO4U/Qika0gMQ5nnj0Qb6gbRSEa3Rltggh05iHvubYFe48lGprsFhvj+a28RYnK2Jei7jo8tXfgXfwHUTXYUY14XkVodUAit9aCSxgF++/X7w/pWAl5KOcH5dAjnEDR9fFsvbaqUS9BulimH+wGEg44mVap/NYiFYJg+D51EPQD7cRxrQQPXlj+37evsNF9jvuxnp6ytg== X-Forefront-Antispam-Report: CIP:216.228.118.232;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:dc7edge1.nvidia.com;CAT:NONE;SFS:(13230040)(36860700016)(1800799024)(376014)(82310400026)(23010399003)(10067099003)(56012099006)(11063799006)(22082099003)(18002099003);DIR:OUT;SFP:1101; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: yQsBTO/y59W8yGeoNyhmLQqcuAxvvjw9iCqcGl8b2ACZzAoSgSp27YZ7ZFZsm4dbikIdT6zZS+nZHMXOtMP+1tXw7xHA5/md08HA+Xp0i/aOzJJsN9nPAaDw/4FX6l25Fu8iwNDB1o/5BFbEc/yYB/ZvzrRtJXOq7gBmR+aPi7TAIgDgfr1SiBcXMDGKKb64MeKqVS5+h1lexqwVueiiyytKuLMZCFLL3sqUmH7mJcUWHSGk/guqVPt39N44U+gBIsF49Q52zkDrKYXBYkgCP2/AlvfWvO154UMdz4ZoZ/ezhfHKH6km6kvM4usjwt8/dy1J1GXD2GiHdrA3lWzxvis35tGNHh7F7VMUruYd2O7yob99WT4xb1LJs72m/o0RoU3XbZuTxMEOc/b8mG1lfPT9zlxPSWM38dCFlYByBvFwB3r9+ElXZ5UOt3sA/baH X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 02 Sep 2026 16:47:52.4976 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 1ff1265c-f255-49f9-5655-08df0911ee51 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.118.232];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: BN7PEPF00000093.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CH0PR12MB8578 From: Shahar Shitrit get_fec_supported_advertised() populates the FEC modes reported as supported to userspace. The MLX5E_ADVERTISE_SUPPORTED_FEC macro only checked MLX5E_FEC_RS_528_514, causing devices that support only the other RS variants (RS_544_514_INTERLEAVED_QUAD or RS_544_514) to not advertise RS as supported to ethtool at all. Introduce MLX5E_FEC_RS_MASK covering all three RS bit positions, update the macro to accept a bitmask directly rather than a single enum value, and pass MLX5E_FEC_RS_MASK for the RS entry. Fixes: b5ede32d3329 ("net/mlx5e: Add support for FEC modes based on 50G per lane links") Fixes: 4e343c11efbb ("net/mlx5e: Support FEC settings for 200G per lane link modes") Signed-off-by: Shahar Shitrit Reviewed-by: Dragos Tatulea Reviewed-by: Yael Chemla Signed-off-by: Tariq Toukan --- drivers/net/ethernet/mellanox/mlx5/core/en/port.h | 4 ++++ drivers/net/ethernet/mellanox/mlx5/core/en_ethtool.c | 12 ++++++------ 2 files changed, 10 insertions(+), 6 deletions(-) diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en/port.h b/drivers/net/ethernet/mellanox/mlx5/core/en/port.h index fa2283dd383b..53dbdf77bcce 100644 --- a/drivers/net/ethernet/mellanox/mlx5/core/en/port.h +++ b/drivers/net/ethernet/mellanox/mlx5/core/en/port.h @@ -66,4 +66,8 @@ enum { MLX5E_FEC_LLRS_272_257_1 = 9, }; +#define MLX5E_FEC_RS_MASK (BIT(MLX5E_FEC_RS_528_514) | \ + BIT(MLX5E_FEC_RS_544_514_INTERLEAVED_QUAD) | \ + BIT(MLX5E_FEC_RS_544_514)) + #endif diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en_ethtool.c b/drivers/net/ethernet/mellanox/mlx5/core/en_ethtool.c index f285ad88b6d5..3ed59ced0407 100644 --- a/drivers/net/ethernet/mellanox/mlx5/core/en_ethtool.c +++ b/drivers/net/ethernet/mellanox/mlx5/core/en_ethtool.c @@ -1002,9 +1002,9 @@ static u32 pplm2ethtool_fec(u_long fec_mode, unsigned long size) return 0; } -#define MLX5E_ADVERTISE_SUPPORTED_FEC(mlx5_fec, ethtool_fec) \ +#define MLX5E_ADVERTISE_SUPPORTED_FEC(fec_mask, ethtool_fec) \ do { \ - if (mlx5e_fec_in_caps(dev, 1 << (mlx5_fec))) \ + if (mlx5e_fec_in_caps(dev, fec_mask)) \ __set_bit(ethtool_fec, \ link_ksettings->link_modes.supported);\ } while (0) @@ -1030,13 +1030,13 @@ static int get_fec_supported_advertised(struct mlx5_core_dev *dev, if (err) return (err == -EOPNOTSUPP) ? 0 : err; - MLX5E_ADVERTISE_SUPPORTED_FEC(MLX5E_FEC_NOFEC, + MLX5E_ADVERTISE_SUPPORTED_FEC(BIT(MLX5E_FEC_NOFEC), ETHTOOL_LINK_MODE_FEC_NONE_BIT); - MLX5E_ADVERTISE_SUPPORTED_FEC(MLX5E_FEC_FIRECODE, + MLX5E_ADVERTISE_SUPPORTED_FEC(BIT(MLX5E_FEC_FIRECODE), ETHTOOL_LINK_MODE_FEC_BASER_BIT); - MLX5E_ADVERTISE_SUPPORTED_FEC(MLX5E_FEC_RS_528_514, + MLX5E_ADVERTISE_SUPPORTED_FEC(MLX5E_FEC_RS_MASK, ETHTOOL_LINK_MODE_FEC_RS_BIT); - MLX5E_ADVERTISE_SUPPORTED_FEC(MLX5E_FEC_LLRS_272_257_1, + MLX5E_ADVERTISE_SUPPORTED_FEC(BIT(MLX5E_FEC_LLRS_272_257_1), ETHTOOL_LINK_MODE_FEC_LLRS_BIT); active_fec_long = active_fec; -- 2.44.0