Re: strong ordering for data registered memory

[David Brean <David.Brean-UdXhSnd/wVw@public.gmane.org>]

Yes, there are HCAs that provide strong ordering.  And an application 
such as OpenMPI checks the HCA model and if appropriate enables a 
mechanism called "eager RDMA" that depends on it.

-David

Richard Frank wrote:
> Today apps are forced to assume that all transports can not provide 
> strong ordering..
> and hence must implement solutions to work around this.
>
> There are specific optimizations an app might make if it knows the 
> underpinning
> transport can make these guarantees..
>
> It would be useful if "strong ordering" were exposed as attribute from 
> a transport..
> and as well - have the ability to provide a hint to enable "strong 
> ordering" on either
> registration or per operation or at the qp level .
>
> Are there any HCAs that provide "strong ordering" today ?
>
> Roland Dreier wrote:
>>  > Some time ago there was an email sent to this group with the subject
>>  > "weak ordering for data registered memory".  I don't recall any 
>> action
>>  > resulting from this thread.  So, I have a question.  If a bit were
>>  > defined to specify "strong ordering", perhaps as a "access" flag (see
>>  > ibv_access_flags) and used with ibv_reg_mr(), would that be 
>> sufficient
>>  > for (1) client applications that need a HW "guarantee" of writing the
>>  > last byte of an RDMA last and (2) platform implementations that need
>>  > to deliver that feature?
>>
>> What would happen if an application asked for strong ordering and the
>> adapter and/or platform is not capable of that?
>>
>> Weak ordering is a bit easier to handle -- the app is saying "if you can
>> make things go faster, don't worry about ordering here" and a platform
>> where it doesn't matter can just ignore it.
>>
>>  - R.
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