clarification on the mlx4 CQE structure

clarification on the mlx4 CQE structure

[Or Gerlitz]

Hi Yevgeny, looking on commit f780a9f "mlx4_core: Add ethernet fields
to CQE struct" I see the following two changes:

@@ -692,14 +692,13 @@ repoll:
-		wc->sl		   = cqe->sl >> 4;
+		wc->sl		   = be16_to_cpu(cqe->sl_vid >> 12);

I wasn't sure if/why a conversion from network order to host order is
neeed here, can you clarify that?

Or.


@@ -39,17 +39,18 @@
 struct mlx4_cqe {
-	__be32			my_qpn;
+	__be32			vlan_my_qpn;
-	u8			sl;
-	u8			reserved1;
+	__be16			sl_vid;


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RE: clarification on the mlx4 CQE structure

[Yevgeny Petrilin]

> @@ -692,14 +692,13 @@ repoll:
> -		wc->sl		   = cqe->sl >> 4;
> +		wc->sl		   = be16_to_cpu(cqe->sl_vid >> 12);
> 
> I wasn't sure if/why a conversion from network order to host order is
neeed here, can you clarify that?

This commit has an endianess bug, that was fixed in commit f781a22f.
The cqe->sl_vid field is a be16, so we needed to convert the sl value to
host order.
Before the commit this field was two u8 fields, so no conversion was
needed.
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Re: clarification on the mlx4 CQE structure

[Or Gerlitz]

Yevgeny Petrilin wrote:
> This commit has an endianess bug, that was fixed in commit f781a22f.
> The cqe->sl_vid field is a be16, so we needed to convert the sl value to
> host order. Before the commit this field was two u8 fields, so no conversion was needed

okay, got it, thanks 

Or.
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