From: Or Gerlitz <ogerlitz-VPRAkNaXOzVWk0Htik3J/w@public.gmane.org>
To: Bart Van Assche <bvanassche-HInyCGIudOg@public.gmane.org>
Cc: Or Gerlitz <or.gerlitz-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>,
Sagi Grimberg <sagig-VPRAkNaXOzVWk0Htik3J/w@public.gmane.org>,
roland-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org,
linux-rdma-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
roid-VPRAkNaXOzVWk0Htik3J/w@public.gmane.org,
oren-VPRAkNaXOzVWk0Htik3J/w@public.gmane.org
Subject: Re: [PATCH for-3.11 7/7] IB/iser: Introduce fast memory registration model (FRWR)
Date: Wed, 24 Jul 2013 19:47:04 +0300 [thread overview]
Message-ID: <51F00508.10908@mellanox.com> (raw)
In-Reply-To: <51EE9773.9050003-HInyCGIudOg@public.gmane.org>
On 23/07/2013 17:47, Bart Van Assche wrote:
>
> Sorry but I had overlooked the bounce buffer patch. Regarding page
> sizes: is an InfiniBand HCA required to support a page size of 512
> bytes ? To me it seems like the smallest page size supported by e.g.
> the ocrdma driver is 4KB. From ocrdma_query_device():
>
> attr->page_size_cap = 0xffff000;
I don't think supporting "block lists" that is pages size of 512B for
memory registration is mandated by the IB spec, even though ConnectX2/3
HCAs do support it,
#ibv_devinfo -v | grep page_size_cap
page_size_cap: 0xfffffe00
# ibv_devinfo -v | grep _id
hca_id: mlx4_0
vendor_id: 0x02c9
vendor_part_id: 26428
board_id: MT_0D81120009
>
> Still regarding page sizes: shouldn't ib_alloc_fast_reg_page_list()
> and ib_alloc_fast_reg_mr() multiply the SG list length by PAGE_SIZE /
> SIZE_4K to compensate for page size differences on architectures where
> virtual memory pages are larger than 4KB ?
My understanding of the API is that it assumes that the HW is capable to
change the page shift (size) associated with certain fast_reg MR for
each mapping.
This is indeed a bit different from the kernel FMR API where the page
shift is provided when the FMR is created.
For mlx4, the relevant field is struct mlx4_mpt_entry->entity_size which
is written with the page_shift provided by the ULP
for FMRs in mlx4_mr_enable and with 0 for fast_reg mrs. Later when fast
reg WR is posted to the HW,
struct mlx4_wqe_fmr_seg->page_size is written with the page shift
provided by the ULP and the HW treats it the same as it
was that entity_size field...
Or.
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next prev parent reply other threads:[~2013-07-24 16:47 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-07-18 13:25 [PATCH for-3.11 0/7] Add Fast-Reg support to the iser initiator driver Or Gerlitz
[not found] ` <1374153931-7313-1-git-send-email-ogerlitz-VPRAkNaXOzVWk0Htik3J/w@public.gmane.org>
2013-07-18 13:25 ` [PATCH for-3.11 1/7] IB/iser: Use proper debug level value for info prints Or Gerlitz
2013-07-18 13:25 ` [PATCH for-3.11 2/7] IB/iser: Restructure allocation/deallocation of connection resources Or Gerlitz
2013-07-18 13:25 ` [PATCH for-3.11 3/7] IB/iser: Accept session->cmds_max from user space Or Gerlitz
2013-07-18 13:25 ` [PATCH for-3.11 4/7] IB/iser: Generalize rdma memory registration Or Gerlitz
2013-07-18 13:25 ` [PATCH for-3.11 5/7] IB/iser: Handle unaligned SG in separate function Or Gerlitz
2013-07-18 13:25 ` [PATCH for-3.11 6/7] IB/iser: Place the fmr pool into a union in iser's IB conn struct Or Gerlitz
2013-07-18 13:25 ` [PATCH for-3.11 7/7] IB/iser: Introduce fast memory registration model (FRWR) Or Gerlitz
[not found] ` <1374153931-7313-8-git-send-email-ogerlitz-VPRAkNaXOzVWk0Htik3J/w@public.gmane.org>
2013-07-22 11:46 ` Bart Van Assche
[not found] ` <51ED1B8E.7070703-HInyCGIudOg@public.gmane.org>
2013-07-22 13:11 ` Sagi Grimberg
[not found] ` <51ED2F97.2080400-VPRAkNaXOzVWk0Htik3J/w@public.gmane.org>
2013-07-23 11:58 ` Bart Van Assche
[not found] ` <51EE6FFE.8040802-HInyCGIudOg@public.gmane.org>
2013-07-23 14:21 ` Or Gerlitz
[not found] ` <CAJZOPZ+1TLQ-vwsZG8dgxhP332CQeDNOWfzGRdTbwRxLRhL95w-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2013-07-23 14:47 ` Bart Van Assche
[not found] ` <51EE9773.9050003-HInyCGIudOg@public.gmane.org>
2013-07-24 16:47 ` Or Gerlitz [this message]
[not found] ` <51F000CB.3050808@mellanox.com>
[not found] ` <51F000CB.3050808-VPRAkNaXOzVWk0Htik3J/w@public.gmane.org>
2013-07-26 9:27 ` Bart Van Assche
2013-07-23 14:33 ` Sagi Grimberg
2013-07-22 14:37 ` Or Gerlitz
2013-07-26 17:15 ` Vu Pham
[not found] ` <51F2AEB6.6090000-VPRAkNaXOzVWk0Htik3J/w@public.gmane.org>
2013-07-28 8:15 ` Or Gerlitz
[not found] ` <51F4D305.7090700-VPRAkNaXOzVWk0Htik3J/w@public.gmane.org>
2013-07-28 9:26 ` Sagi Grimberg
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