[PATCH 0/2] : cxgb4/rdma patches

[PATCH 0/2] : cxgb4/rdma patches

[Pramod Kumar]

PATCH 1/2: Handles debug interface buffer size. Since IPv6 
size is bigger than IPv4 hence increased debug interface 
buffer size.

PATCH 2/2: 0B MRs need some tweaks to work correctly with HW
hence handling the same throug this patch.

Pramod Kumar (2):
  cxgb4/rdma:Increase epd buff size for debug interface
  cxgb4/rdma: configure 0B MRs to match HW implementation

 drivers/infiniband/hw/cxgb4/device.c |    2 +-
 drivers/infiniband/hw/cxgb4/mem.c    |    6 ++++--
 2 files changed, 5 insertions(+), 3 deletions(-)

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[PATCH 1/2] cxgb4/rdma:Increase epd buff size for debug interface

[Pramod Kumar]

IPv6 address string lengths require increasing
the buffer size for debugfs handlers.

Signed-off-by: Pramod Kumar <pramod-ut6Up61K2wZBDgjK7y7TUQ@public.gmane.org>
---
 drivers/infiniband/hw/cxgb4/device.c |    2 +-
 1 files changed, 1 insertions(+), 1 deletions(-)

diff --git a/drivers/infiniband/hw/cxgb4/device.c b/drivers/infiniband/hw/cxgb4/device.c
index 72f1f05..eb5df4e 100644
--- a/drivers/infiniband/hw/cxgb4/device.c
+++ b/drivers/infiniband/hw/cxgb4/device.c
@@ -670,7 +670,7 @@ static int ep_open(struct inode *inode, struct file *file)
 	idr_for_each(&epd->devp->stid_idr, count_idrs, &count);
 	spin_unlock_irq(&epd->devp->lock);
 
-	epd->bufsize = count * 160;
+	epd->bufsize = count * 240;
 	epd->buf = vmalloc(epd->bufsize);
 	if (!epd->buf) {
 		ret = -ENOMEM;
-- 
1.7.1

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[PATCH 2/2] cxgb4/rdma: configure 0B MRs to match HW implementation

[Pramod Kumar]

0B MRs need some tweaks to work correctly with HW.
So when writing the TPTE, if the MR length is zero we now do:

1) turn off all permissions
2) set the length to -1

While functionality/capabilities of the MR is the same with these
changes, it resolves a dapltest 0B RDMA Read test failure
Based on original work by Steve Wise <swise-7bPotxP6k4+P2YhJcF5u+vpXobYPEAuW@public.gmane.org>

Signed-off-by: Pramod Kumar <pramod-ut6Up61K2wZBDgjK7y7TUQ@public.gmane.org>
Signed-off-by: Steve Wise <swise-7bPotxP6k4+P2YhJcF5u+vpXobYPEAuW@public.gmane.org>
Signed-off-by: Hariprasad Shenai <hariprasad-ut6Up61K2wZBDgjK7y7TUQ@public.gmane.org>
---
 drivers/infiniband/hw/cxgb4/mem.c |    6 ++++--
 1 files changed, 4 insertions(+), 2 deletions(-)

diff --git a/drivers/infiniband/hw/cxgb4/mem.c b/drivers/infiniband/hw/cxgb4/mem.c
index ec7a298..a299ba8 100644
--- a/drivers/infiniband/hw/cxgb4/mem.c
+++ b/drivers/infiniband/hw/cxgb4/mem.c
@@ -369,9 +369,11 @@ static int register_mem(struct c4iw_dev *rhp, struct c4iw_pd *php,
 	int ret;
 
 	ret = write_tpt_entry(&rhp->rdev, 0, &stag, 1, mhp->attr.pdid,
-			      FW_RI_STAG_NSMR, mhp->attr.perms,
+			      FW_RI_STAG_NSMR, mhp->attr.len ?
+			      mhp->attr.perms : 0,
 			      mhp->attr.mw_bind_enable, mhp->attr.zbva,
-			      mhp->attr.va_fbo, mhp->attr.len, shift - 12,
+			      mhp->attr.va_fbo, mhp->attr.len ?
+			      mhp->attr.len : -1, shift - 12,
 			      mhp->attr.pbl_size, mhp->attr.pbl_addr);
 	if (ret)
 		return ret;
-- 
1.7.1

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Re: [PATCH 2/2] cxgb4/rdma: configure 0B MRs to match HW implementation

[Or Gerlitz]

On 10/16/2014 12:36 PM, Pramod Kumar wrote:
> 0B MRs need some tweaks to work correctly with HW.

  What's the use case?
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RE: [PATCH 2/2] cxgb4/rdma: configure 0B MRs to match HW implementation

[Steve Wise]

> -----Original Message-----
> From: Or Gerlitz [mailto:ogerlitz-VPRAkNaXOzVWk0Htik3J/w@public.gmane.org]
> Sent: Thursday, October 16, 2014 5:23 AM
> To: Pramod Kumar
> Cc: linux-rdma-u79uwXL29TY76Z2rM5mHXA@public.gmane.org; roland-BHEL68pLQRGGvPXPguhicg@public.gmane.org; swise-7bPotxP6k4+P2YhJcF5u+vpXobYPEAuW@public.gmane.org; hariprasad-ut6Up61K2wZBDgjK7y7TUQ@public.gmane.org
> Subject: Re: [PATCH 2/2] cxgb4/rdma: configure 0B MRs to match HW implementation
> 
> 
> On 10/16/2014 12:36 PM, Pramod Kumar wrote:
> > 0B MRs need some tweaks to work correctly with HW.
> 
>   What's the use case?

The dapltest tool does this if you run the transaction test and do 0B IO. A customer discovered the issue.

Steve.



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