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From: Steve Wise <swise-7bPotxP6k4+P2YhJcF5u+vpXobYPEAuW@public.gmane.org>
To: Christoph Hellwig <hch-jcswGhMUV9g@public.gmane.org>,
	Doug Ledford <dledford-H+wXaHxf7aLQT0dZR+AlfA@public.gmane.org>
Cc: linux-rdma-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
Subject: Re: [PATCH 5/9] cxgb3: simplify iwch_get_dma_wr
Date: Mon, 16 Nov 2015 10:52:03 -0600	[thread overview]
Message-ID: <564A09B3.90809@opengridcomputing.com> (raw)
In-Reply-To: <1447610762-3781-6-git-send-email-hch-jcswGhMUV9g@public.gmane.org>

On 11/15/2015 12:05 PM, Christoph Hellwig wrote:
> Fold simplified versions of build_phys_page_list and
> iwch_register_phys_mem into iwch_get_dma_wr now that no other callers
> are left.
>
> Signed-off-by: Christoph Hellwig <hch-jcswGhMUV9g@public.gmane.org>
> ---
>   drivers/infiniband/hw/cxgb3/iwch_mem.c      | 71 ---------------------------
>   drivers/infiniband/hw/cxgb3/iwch_provider.c | 75 ++++++++++++-----------------
>   drivers/infiniband/hw/cxgb3/iwch_provider.h |  8 ---
>   3 files changed, 30 insertions(+), 124 deletions(-)
>
> diff --git a/drivers/infiniband/hw/cxgb3/iwch_mem.c b/drivers/infiniband/hw/cxgb3/iwch_mem.c
> index 3a5e27d..1d04c87 100644
> --- a/drivers/infiniband/hw/cxgb3/iwch_mem.c
> +++ b/drivers/infiniband/hw/cxgb3/iwch_mem.c
> @@ -99,74 +99,3 @@ int iwch_write_pbl(struct iwch_mr *mhp, __be64 *pages, int npages, int offset)
>   	return cxio_write_pbl(&mhp->rhp->rdev, pages,
>   			      mhp->attr.pbl_addr + (offset << 3), npages);
>   }
> -
> -int build_phys_page_list(struct ib_phys_buf *buffer_list,
> -					int num_phys_buf,
> -					u64 *iova_start,
> -					u64 *total_size,
> -					int *npages,
> -					int *shift,
> -					__be64 **page_list)
> -{
> -	u64 mask;
> -	int i, j, n;
> -
> -	mask = 0;
> -	*total_size = 0;
> -	for (i = 0; i < num_phys_buf; ++i) {
> -		if (i != 0 && buffer_list[i].addr & ~PAGE_MASK)
> -			return -EINVAL;
> -		if (i != 0 && i != num_phys_buf - 1 &&
> -		    (buffer_list[i].size & ~PAGE_MASK))
> -			return -EINVAL;
> -		*total_size += buffer_list[i].size;
> -		if (i > 0)
> -			mask |= buffer_list[i].addr;
> -		else
> -			mask |= buffer_list[i].addr & PAGE_MASK;
> -		if (i != num_phys_buf - 1)
> -			mask |= buffer_list[i].addr + buffer_list[i].size;
> -		else
> -			mask |= (buffer_list[i].addr + buffer_list[i].size +
> -				PAGE_SIZE - 1) & PAGE_MASK;
> -	}
> -
> -	if (*total_size > 0xFFFFFFFFULL)
> -		return -ENOMEM;
> -
> -	/* Find largest page shift we can use to cover buffers */
> -	for (*shift = PAGE_SHIFT; *shift < 27; ++(*shift))
> -		if ((1ULL << *shift) & mask)
> -			break;
> -
> -	buffer_list[0].size += buffer_list[0].addr & ((1ULL << *shift) - 1);
> -	buffer_list[0].addr &= ~0ull << *shift;
> -
> -	*npages = 0;
> -	for (i = 0; i < num_phys_buf; ++i)
> -		*npages += (buffer_list[i].size +
> -			(1ULL << *shift) - 1) >> *shift;
> -
> -	if (!*npages)
> -		return -EINVAL;
> -
> -	*page_list = kmalloc(sizeof(u64) * *npages, GFP_KERNEL);
> -	if (!*page_list)
> -		return -ENOMEM;
> -
> -	n = 0;
> -	for (i = 0; i < num_phys_buf; ++i)
> -		for (j = 0;
> -		     j < (buffer_list[i].size + (1ULL << *shift) - 1) >> *shift;
> -		     ++j)
> -			(*page_list)[n++] = cpu_to_be64(buffer_list[i].addr +
> -			    ((u64) j << *shift));
> -
> -	PDBG("%s va 0x%llx mask 0x%llx shift %d len %lld pbl_size %d\n",
> -	     __func__, (unsigned long long) *iova_start,
> -	     (unsigned long long) mask, *shift, (unsigned long long) *total_size,
> -	     *npages);
> -
> -	return 0;
> -
> -}
> diff --git a/drivers/infiniband/hw/cxgb3/iwch_provider.c b/drivers/infiniband/hw/cxgb3/iwch_provider.c
> index b184933..9642ec4a 100644
> --- a/drivers/infiniband/hw/cxgb3/iwch_provider.c
> +++ b/drivers/infiniband/hw/cxgb3/iwch_provider.c
> @@ -479,24 +479,26 @@ static int iwch_dereg_mr(struct ib_mr *ib_mr)
>   	return 0;
>   }
>   
> -static struct ib_mr *iwch_register_phys_mem(struct ib_pd *pd,
> -					struct ib_phys_buf *buffer_list,
> -					int num_phys_buf,
> -					int acc,
> -					u64 *iova_start)
> +static struct ib_mr *iwch_get_dma_mr(struct ib_pd *pd, int acc)
>   {
> +	const u64 total_size = 0xffffffff;
> +	const u64 mask = (total_size + PAGE_SIZE - 1) & PAGE_MASK;
> +	struct iwch_pd *php = to_iwch_pd(pd);
> +	struct iwch_dev *rhp = php->rhp;
>   	__be64 *page_list;
>   	int shift;
> -	u64 total_size;
> -	int npages;
> -	struct iwch_dev *rhp;
> -	struct iwch_pd *php;
>   	struct iwch_mr *mhp;
> -	int ret;
> +	int ret, npages, i;
>   
>   	PDBG("%s ib_pd %p\n", __func__, pd);
> -	php = to_iwch_pd(pd);
> -	rhp = php->rhp;
> +
> +	/*
> +	 * T3 only supports 32 bits of size.
> +	 */
> +	if (sizeof(phys_addr_t) > 4) {
> +		pr_warn_once(MOD "Cannot support dma_mrs on this platform.\n");
> +		return ERR_PTR(-ENOTSUPP);
> +	}
>   
>   	mhp = kzalloc(sizeof(*mhp), GFP_KERNEL);
>   	if (!mhp)
> @@ -504,22 +506,28 @@ static struct ib_mr *iwch_register_phys_mem(struct ib_pd *pd,
>   
>   	mhp->rhp = rhp;
>   
> -	/* First check that we have enough alignment */
> -	if ((*iova_start & ~PAGE_MASK) != (buffer_list[0].addr & ~PAGE_MASK)) {
> +	/* Find largest page shift we can use to cover buffers */
> +	for (shift = PAGE_SHIFT; shift < 27; ++(shift))
> +		if ((1ULL << shift) & mask)
> +			break;
> +

Won't shift always be 26 here?

> +	npages = (total_size + (1ULL << shift) - 1) >> shift;
> +	if (!npages) {
>   		ret = -EINVAL;
>   		goto err;
>   	}
>   
> -	if (num_phys_buf > 1 &&
> -	    ((buffer_list[0].addr + buffer_list[0].size) & ~PAGE_MASK)) {
> -		ret = -EINVAL;
> +	page_list = kmalloc_array(npages, sizeof(u64), GFP_KERNEL);
> +	if (!page_list) {
> +		ret = -ENOMEM;
>   		goto err;
>   	}
>   
> -	ret = build_phys_page_list(buffer_list, num_phys_buf, iova_start,
> -				   &total_size, &npages, &shift, &page_list);
> -	if (ret)
> -		goto err;
> +	for (i = 0; i < npages; i++)
> +		page_list[i] = cpu_to_be64((u64)i << shift);
> +
> +	PDBG("%s mask 0x%llx shift %d len %lld pbl_size %d\n",
> +		__func__, mask, shift, total_size, npages);
>   
>   	ret = iwch_alloc_pbl(mhp, npages);
>   	if (ret) {
> @@ -536,7 +544,7 @@ static struct ib_mr *iwch_register_phys_mem(struct ib_pd *pd,
>   	mhp->attr.zbva = 0;
>   
>   	mhp->attr.perms = iwch_ib_to_tpt_access(acc);
> -	mhp->attr.va_fbo = *iova_start;
> +	mhp->attr.va_fbo = 0;
>   	mhp->attr.page_size = shift - 12;
>   
>   	mhp->attr.len = (u32) total_size;
> @@ -553,7 +561,6 @@ err_pbl:
>   err:
>   	kfree(mhp);
>   	return ERR_PTR(ret);
> -
>   }
>   
>   static struct ib_mr *iwch_reg_user_mr(struct ib_pd *pd, u64 start, u64 length,
> @@ -659,28 +666,6 @@ err:
>   	return ERR_PTR(err);
>   }
>   
> -static struct ib_mr *iwch_get_dma_mr(struct ib_pd *pd, int acc)
> -{
> -	struct ib_phys_buf bl;
> -	u64 kva;
> -	struct ib_mr *ibmr;
> -
> -	PDBG("%s ib_pd %p\n", __func__, pd);
> -
> -	/*
> -	 * T3 only supports 32 bits of size.
> -	 */
> -	if (sizeof(phys_addr_t) > 4) {
> -		pr_warn_once(MOD "Cannot support dma_mrs on this platform.\n");
> -		return ERR_PTR(-ENOTSUPP);
> -	}
> -	bl.size = 0xffffffff;
> -	bl.addr = 0;
> -	kva = 0;
> -	ibmr = iwch_register_phys_mem(pd, &bl, 1, acc, &kva);
> -	return ibmr;
> -}
> -
>   static struct ib_mw *iwch_alloc_mw(struct ib_pd *pd, enum ib_mw_type type)
>   {
>   	struct iwch_dev *rhp;
> diff --git a/drivers/infiniband/hw/cxgb3/iwch_provider.h b/drivers/infiniband/hw/cxgb3/iwch_provider.h
> index f24df44..252c464 100644
> --- a/drivers/infiniband/hw/cxgb3/iwch_provider.h
> +++ b/drivers/infiniband/hw/cxgb3/iwch_provider.h
> @@ -341,14 +341,6 @@ int iwch_register_mem(struct iwch_dev *rhp, struct iwch_pd *php,
>   int iwch_alloc_pbl(struct iwch_mr *mhp, int npages);
>   void iwch_free_pbl(struct iwch_mr *mhp);
>   int iwch_write_pbl(struct iwch_mr *mhp, __be64 *pages, int npages, int offset);
> -int build_phys_page_list(struct ib_phys_buf *buffer_list,
> -					int num_phys_buf,
> -					u64 *iova_start,
> -					u64 *total_size,
> -					int *npages,
> -					int *shift,
> -					__be64 **page_list);
> -
>   
>   #define IWCH_NODE_DESC "cxgb3 Chelsio Communications"
>   

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  parent reply	other threads:[~2015-11-16 16:52 UTC|newest]

Thread overview: 18+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-11-15 18:05 garbage collect old memory registration code Christoph Hellwig
     [not found] ` <1447610762-3781-1-git-send-email-hch-jcswGhMUV9g@public.gmane.org>
2015-11-15 18:05   ` [PATCH 1/9] IB: start documenting device capabilities Christoph Hellwig
2015-11-15 18:05   ` [PATCH 2/9] IB: remove ib_query_mr Christoph Hellwig
2015-11-15 18:05   ` [PATCH 3/9] IB: remove support for phys MRs Christoph Hellwig
     [not found]     ` <1447610762-3781-4-git-send-email-hch-jcswGhMUV9g@public.gmane.org>
2015-11-16 16:41       ` Steve Wise
2015-11-15 18:05   ` [PATCH 4/9] IB: remove in-kernel support for memory windows Christoph Hellwig
     [not found]     ` <1447610762-3781-5-git-send-email-hch-jcswGhMUV9g@public.gmane.org>
2015-11-16 17:00       ` Sagi Grimberg
     [not found]         ` <564A0B96.5010703-LDSdmyG8hGV8YrgS2mwiifqBs+8SCbDb@public.gmane.org>
2015-11-16 17:02           ` Christoph Hellwig
     [not found]             ` <20151116170258.GA32300-jcswGhMUV9g@public.gmane.org>
2015-11-16 18:33               ` Sagi Grimberg
     [not found]                 ` <564A2187.3060000-LDSdmyG8hGV8YrgS2mwiifqBs+8SCbDb@public.gmane.org>
2015-11-16 18:41                   ` Christoph Hellwig
2015-11-15 18:05   ` [PATCH 5/9] cxgb3: simplify iwch_get_dma_wr Christoph Hellwig
     [not found]     ` <1447610762-3781-6-git-send-email-hch-jcswGhMUV9g@public.gmane.org>
2015-11-16 16:52       ` Steve Wise [this message]
2015-11-15 18:05   ` [PATCH 6/9] nes: simplify nes_reg_phys_mr calling conventions Christoph Hellwig
2015-11-15 18:06   ` [PATCH 7/9] amso1100: fold c2_reg_phys_mr into c2_get_dma_mr Christoph Hellwig
     [not found]     ` <1447610762-3781-8-git-send-email-hch-jcswGhMUV9g@public.gmane.org>
2015-11-16 16:54       ` Steve Wise
2015-11-15 18:06   ` [PATCH 8/9] ehca: stop using struct ib_phys_buf Christoph Hellwig
2015-11-15 18:06   ` [PATCH 9/9] IB: remove the struct ib_phys_buf definition Christoph Hellwig
2015-11-23 17:58   ` garbage collect old memory registration code Jason Gunthorpe

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