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Tue, 8 Jun 2021 11:53:53 +0000 Received: from [172.27.15.93] (172.20.187.6) by HQMAIL107.nvidia.com (172.20.187.13) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Tue, 8 Jun 2021 11:53:51 +0000 Subject: Re: [Bug Report] RDMA/core: test_qpex.py attempts invalid MW bind operation To: Leon Romanovsky , "Pearson, Robert B" CC: Jason Gunthorpe , RDMA mailing list References: <8d329494-6653-359b-91aa-31ac9dc8122c@gmail.com> <474ad554-574c-120e-97ba-b617e346f14d@gmail.com> From: Edward Srouji Message-ID: <591f489c-882b-de37-eb1f-d39a71fcbd05@nvidia.com> Date: Tue, 8 Jun 2021 14:53:47 +0300 User-Agent: Mozilla/5.0 (Windows NT 10.0; Win64; x64; rv:78.0) Gecko/20100101 Thunderbird/78.10.2 MIME-Version: 1.0 In-Reply-To: Content-Type: text/plain; charset="utf-8"; format=flowed Content-Transfer-Encoding: 8bit Content-Language: en-US X-Originating-IP: [172.20.187.6] X-ClientProxiedBy: HQMAIL107.nvidia.com (172.20.187.13) To HQMAIL107.nvidia.com (172.20.187.13) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: 33025e4d-0095-4bf6-64ce-08d92a7416bd X-MS-TrafficTypeDiagnostic: BN7PR12MB2611: X-Microsoft-Antispam-PRVS: X-MS-Oob-TLC-OOBClassifiers: OLM:2887; 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X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 08 Jun 2021 11:53:53.3922 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 33025e4d-0095-4bf6-64ce-08d92a7416bd X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.112.34];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: BN8NAM11FT060.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: BN7PR12MB2611 Precedence: bulk List-ID: X-Mailing-List: linux-rdma@vger.kernel.org On 6/8/2021 9:47 AM, Leon Romanovsky wrote: > On Mon, Jun 07, 2021 at 11:54:29PM -0500, Pearson, Robert B wrote: >> On 6/7/2021 11:41 PM, Leon Romanovsky wrote: >>> On Mon, Jun 07, 2021 at 04:50:20PM -0500, Pearson, Robert B wrote: >>>> sorry/this time without the HTML. >>>> >>>> ====================================================================== >>>> ERROR: test_qp_ex_rc_bind_mw (tests.test_qpex.QpExTestCase) >>>> Verify bind memory window operation using the new post_send API. >>>> ---------------------------------------------------------------------- >>>> Traceback (most recent call last): >>>>   File "/home/rpearson/src/rdma-core/tests/test_qpex.py", line 292, in >>>> test_qp_ex_rc_bind_mw >>>>     u.poll_cq(server.cq) >>>>   File "/home/rpearson/src/rdma-core/tests/utils.py", line 538, in poll_cq >>>>     raise PyverbsRDMAError('Completion status is {s}'. >>>> pyverbs.pyverbs_error.PyverbsRDMAError: Completion status is Memory window >>>> bind error. Errno: 6, No such device or address >>>> >>>> This test attempts to bind a type 2 MW to an MR that does not have bind mw >>>> access set and expects the test to succeed. You're right, looks like a test bug. I'll send a fix upstream. Can you please confirm that this solves your issue: diff --git a/tests/test_qpex.py b/tests/test_qpex.py index 4b58260f..c2d67ee8 100644 --- a/tests/test_qpex.py +++ b/tests/test_qpex.py @@ -149,7 +149,7 @@ class QpExRCBindMw(RCResources):          create_qp_ex(self, e.IBV_QPT_RC, e.IBV_QP_EX_WITH_BIND_MW)      def create_mr(self): -        self.mr = u.create_custom_mr(self, e.IBV_ACCESS_REMOTE_WRITE) +        self.mr = u.create_custom_mr(self, e.IBV_ACCESS_REMOTE_WRITE | e.IBV_ACCESS_MW_BIND) >>> Does the test break after your MW series? Or will it break not-merged >>> code yet? >>> >>> Generally speaking, we expect that developers run rdma-core tests and >>> fixed/extend them prior to the submission. >>> >>> Thanks >>> >>>> Bob Pearson >> Nope. I don't have real RNICs at home to test. But (see my note to Zhu) the >> non extended APIs do set the access flags correctly and the extended test >> case does not. The wr_bind_mw() function can't fix this for the test case. >> It has to set the access flags when it creates the MR and it didn't. It is >> possible that mlx5 doesn't check the bind access flag but that seems >> unlikely. > mlx5 devices support MW 1 & 2 and kernel checks that only these types > can be accepted from the user space. This is why mlx5 doesn't need to > check access flags again. > > 903 static int ib_uverbs_alloc_mw(struct uverbs_attr_bundle *attrs) > 904 { > > .... > > 927 if (cmd.mw_type != IB_MW_TYPE_1 && cmd.mw_type != IB_MW_TYPE_2) { > 928 ret = -EINVAL; > 929 goto err_put; > 930 } > > > Thanks I see that mlx5 checks the access flags in userspace only if MW_DEBUG is turned on (in set_bind_wr()). I guess that's for the sake of performance, as it's part of the data path. >> Bob >>