linux-rdma.vger.kernel.org archive mirror
 help / color / mirror / Atom feed
From: Tariq Toukan <ttoukan.linux@gmail.com>
To: Simon Horman <horms@kernel.org>, Tariq Toukan <tariqt@nvidia.com>
Cc: Eric Dumazet <edumazet@google.com>,
	Jakub Kicinski <kuba@kernel.org>, Paolo Abeni <pabeni@redhat.com>,
	Andrew Lunn <andrew+netdev@lunn.ch>,
	"David S. Miller" <davem@davemloft.net>,
	Saeed Mahameed <saeedm@nvidia.com>,
	Leon Romanovsky <leon@kernel.org>, Mark Bloch <mbloch@nvidia.com>,
	netdev@vger.kernel.org, linux-rdma@vger.kernel.org,
	linux-kernel@vger.kernel.org, Gal Pressman <gal@nvidia.com>,
	Carolina Jubran <cjubran@nvidia.com>,
	Dragos Tatulea <dtatulea@nvidia.com>
Subject: Re: [PATCH net-next 2/7] net/mlx5e: Use TIR API in mlx5e_modify_tirs_lb()
Date: Sun, 26 Oct 2025 14:45:54 +0200	[thread overview]
Message-ID: <a3807c58-be93-423c-b801-339c657a0bb9@gmail.com> (raw)
In-Reply-To: <aPonYFV1S4N5COKZ@horms.kernel.org>



On 23/10/2025 16:02, Simon Horman wrote:
> On Thu, Oct 23, 2025 at 09:43:35AM +0300, Tariq Toukan wrote:
> 
> ...
> 
>> diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en/tir.c b/drivers/net/ethernet/mellanox/mlx5/core/en/tir.c
>> index 19499072f67f..0b55e77f19c8 100644
>> --- a/drivers/net/ethernet/mellanox/mlx5/core/en/tir.c
>> +++ b/drivers/net/ethernet/mellanox/mlx5/core/en/tir.c
>> @@ -146,6 +146,31 @@ void mlx5e_tir_builder_build_direct(struct mlx5e_tir_builder *builder)
>>   	MLX5_SET(tirc, tirc, rx_hash_fn, MLX5_RX_HASH_FN_INVERTED_XOR8);
>>   }
>>   
>> +static void mlx5e_tir_context_self_lb_block(void *tirc, bool enable_uc_lb,
>> +					    bool enable_mc_lb)
>> +{
>> +	u8 lb_flags = 0;
>> +
>> +	if (enable_uc_lb)
>> +		lb_flags = MLX5_TIRC_SELF_LB_BLOCK_BLOCK_UNICAST;
>> +	if (enable_mc_lb)
>> +		lb_flags |= MLX5_TIRC_SELF_LB_BLOCK_BLOCK_MULTICAST;
>> +
>> +	MLX5_SET(tirc, tirc, self_lb_block, lb_flags);
>> +}
>> +
>> +void mlx5e_tir_builder_build_self_lb_block(struct mlx5e_tir_builder *builder,
>> +					   bool enable_uc_lb,
>> +					   bool enable_mc_lb)
>> +{
>> +	void *tirc = mlx5e_tir_builder_get_tirc(builder);
>> +
>> +	if (builder->modify)
>> +		MLX5_SET(modify_tir_in, builder->in, bitmask.self_lb_en, 1);
>> +
>> +	mlx5e_tir_context_self_lb_block(tirc, enable_uc_lb, enable_mc_lb);
>> +}
>> +
> 
> ...
> 
>> diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en_common.c b/drivers/net/ethernet/mellanox/mlx5/core/en_common.c
>> index 376a018b2db1..fad6b761f622 100644
>> --- a/drivers/net/ethernet/mellanox/mlx5/core/en_common.c
>> +++ b/drivers/net/ethernet/mellanox/mlx5/core/en_common.c
>> @@ -250,43 +250,30 @@ void mlx5e_destroy_mdev_resources(struct mlx5_core_dev *mdev)
>>   int mlx5e_modify_tirs_lb(struct mlx5_core_dev *mdev, bool enable_uc_lb,
>>   			 bool enable_mc_lb)
> 
> ...
> 
>> -	if (enable_uc_lb)
>> -		lb_flags = MLX5_TIRC_SELF_LB_BLOCK_BLOCK_UNICAST;
>> -
>> -	if (enable_mc_lb)
>> -		lb_flags |= MLX5_TIRC_SELF_LB_BLOCK_BLOCK_MULTICAST;
>> -
>> -	if (lb_flags)
>> -		MLX5_SET(modify_tir_in, in, ctx.self_lb_block, lb_flags);
>> -
>> -	MLX5_SET(modify_tir_in, in, bitmask.self_lb_en, 1);
>> +	mlx5e_tir_builder_build_self_lb_block(builder, enable_uc_lb,
>> +					      enable_mc_lb);
> 
> Hi,
> 
> Maybe I'm reading this wrong, and possibly it is not important,
> but it seems to me that the update above reverses the
> 
> ...
> order of the MLX5_SET() invocations.
> 

The order here is not important.
The FW command is filled in any order and only then FW is called.


  reply	other threads:[~2025-10-26 12:45 UTC|newest]

Thread overview: 13+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-10-23  6:43 [PATCH net-next 0/7] net/mlx5e: Reduce interface downtime on configuration change Tariq Toukan
2025-10-23  6:43 ` [PATCH net-next 1/7] net/mlx5e: Enhance function structures for self loopback prevention application Tariq Toukan
2025-10-23  6:43 ` [PATCH net-next 2/7] net/mlx5e: Use TIR API in mlx5e_modify_tirs_lb() Tariq Toukan
2025-10-23 13:02   ` Simon Horman
2025-10-26 12:45     ` Tariq Toukan [this message]
2025-10-23 13:31   ` Simon Horman
2025-10-26 12:50     ` Tariq Toukan
2025-10-28  9:57       ` Paolo Abeni
2025-10-23  6:43 ` [PATCH net-next 3/7] net/mlx5e: Allow setting self loopback prevention bits on TIR init Tariq Toukan
2025-10-23  6:43 ` [PATCH net-next 4/7] net/mlx5: IPoIB, set self loopback prevention in " Tariq Toukan
2025-10-23  6:43 ` [PATCH net-next 5/7] net/mlx5e: Do not re-apply TIR loopback configuration if not necessary Tariq Toukan
2025-10-23  6:43 ` [PATCH net-next 6/7] net/mlx5e: Pass old channels as argument to mlx5e_switch_priv_channels Tariq Toukan
2025-10-23  6:43 ` [PATCH net-next 7/7] net/mlx5e: Defer channels closure to reduce interface down time Tariq Toukan

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=a3807c58-be93-423c-b801-339c657a0bb9@gmail.com \
    --to=ttoukan.linux@gmail.com \
    --cc=andrew+netdev@lunn.ch \
    --cc=cjubran@nvidia.com \
    --cc=davem@davemloft.net \
    --cc=dtatulea@nvidia.com \
    --cc=edumazet@google.com \
    --cc=gal@nvidia.com \
    --cc=horms@kernel.org \
    --cc=kuba@kernel.org \
    --cc=leon@kernel.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=linux-rdma@vger.kernel.org \
    --cc=mbloch@nvidia.com \
    --cc=netdev@vger.kernel.org \
    --cc=pabeni@redhat.com \
    --cc=saeedm@nvidia.com \
    --cc=tariqt@nvidia.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).