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[41.210.143.148]) by smtp.gmail.com with UTF8SMTPSA id a640c23a62f3a-ad52d437585sm1789776266b.115.2025.05.27.00.46.47 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 27 May 2025 00:46:48 -0700 (PDT) Date: Tue, 27 May 2025 10:46:44 +0300 From: Dan Carpenter To: Subbaraya Sundeep Cc: Eugenia Emantayev , Tariq Toukan , Andrew Lunn , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Or Gerlitz , Matan Barak , netdev@vger.kernel.org, linux-rdma@vger.kernel.org, linux-kernel@vger.kernel.org, kernel-janitors@vger.kernel.org Subject: Re: [PATCH net] net/mlx4_en: Prevent potential integer overflow calculating Hz Message-ID: References: Precedence: bulk X-Mailing-List: linux-rdma@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: On Tue, May 27, 2025 at 07:31:22AM +0000, Subbaraya Sundeep wrote: > Hi, > > On 2025-05-27 at 05:51:38, Dan Carpenter (dan.carpenter@linaro.org) wrote: > > The "freq" variable is in terms of MHz and "max_val_cycles" is in terms > > of Hz. The fact that "max_val_cycles" is a u64 suggests that support > > for high frequency is intended but the "freq_khz * 1000" would overflow > > the u32 type if we went above 4GHz. Use unsigned long type for the > > mutliplication to prevent that. > > > > Fixes: 31c128b66e5b ("net/mlx4_en: Choose time-stamping shift value according to HW frequency") > > Signed-off-by: Dan Carpenter > > --- > > drivers/net/ethernet/mellanox/mlx4/en_clock.c | 2 +- > > 1 file changed, 1 insertion(+), 1 deletion(-) > > > > diff --git a/drivers/net/ethernet/mellanox/mlx4/en_clock.c b/drivers/net/ethernet/mellanox/mlx4/en_clock.c > > index cd754cd76bde..7abd6a7c9ebe 100644 > > --- a/drivers/net/ethernet/mellanox/mlx4/en_clock.c > > +++ b/drivers/net/ethernet/mellanox/mlx4/en_clock.c > > @@ -249,7 +249,7 @@ static const struct ptp_clock_info mlx4_en_ptp_clock_info = { > > static u32 freq_to_shift(u16 freq) > > { > > u32 freq_khz = freq * 1000; > > - u64 max_val_cycles = freq_khz * 1000 * MLX4_EN_WRAP_AROUND_SEC; > > + u64 max_val_cycles = freq_khz * 1000UL * MLX4_EN_WRAP_AROUND_SEC; > > 1000ULL would be better then. Yeah, that's true. regards, dan carpenter