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[34.127.9.76]) by smtp.gmail.com with ESMTPSA id 41be03b00d2f7-c7ffbcaa477sm10680045a12.31.2026.05.04.15.35.46 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 04 May 2026 15:35:46 -0700 (PDT) Date: Mon, 4 May 2026 22:35:43 +0000 From: David Matlack To: Jason Gunthorpe Cc: Alex Williamson , kvm@vger.kernel.org, Leon Romanovsky , linux-kselftest@vger.kernel.org, linux-rdma@vger.kernel.org, Mark Bloch , netdev@vger.kernel.org, Saeed Mahameed , Shuah Khan , Tariq Toukan , patches@lists.linux.dev Subject: Re: [PATCH 09/11] vfio: selftests: Add mlx5 driver - HW init and command interface Message-ID: References: <0-v1-dc5fa250ca1d+3213-mlx5st_jgg@nvidia.com> <9-v1-dc5fa250ca1d+3213-mlx5st_jgg@nvidia.com> Precedence: bulk X-Mailing-List: linux-rdma@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <9-v1-dc5fa250ca1d+3213-mlx5st_jgg@nvidia.com> On 2026-04-30 09:08 PM, Jason Gunthorpe wrote: > +/* > + * Driver state — overlaid on device->driver.region.vaddr. > + * > + * Contains both software-only state and HW-visible DMA buffers. HW buffers need > + * strict IOVA alignment. > + */ > +struct mlx5st_device { Can we do s/mlx5st/mlx5/ on the series? I assume st is for selftests and that is already implied by this file being under tools/testing/selftests. > +/* > + * Probe — match mlx5 devices by PCI vendor/device ID. > + */ > + > +#define PCI_VENDOR_ID_MELLANOX 0x15b3 nit: Use #include > +static int mlx5st_probe(struct vfio_pci_device *device) > +{ > + static const u16 mlx5st_pci_ids[] = { > + 0x1011, /* Connect-IB */ > + 0x1012, /* Connect-IB VF */ > + 0x1013, /* ConnectX-4 */ > + 0x1014, /* ConnectX-4 VF */ > + 0x1015, /* ConnectX-4LX */ > + 0x1016, /* ConnectX-4LX VF */ > + 0x1017, /* ConnectX-5 */ > + 0x1018, /* ConnectX-5 VF */ > + 0x1019, /* ConnectX-5 Ex */ > + 0x101a, /* ConnectX-5 Ex VF */ > + 0x101b, /* ConnectX-6 */ > + 0x101c, /* ConnectX-6 VF */ > + 0x101d, /* ConnectX-6 Dx */ > + 0x101e, /* ConnectX-6 Dx VF */ > + 0x101f, /* ConnectX-6 LX */ > + 0x1021, /* ConnectX-7 */ > + 0x1023, /* ConnectX-8 */ > + 0x1025, /* ConnectX-9 */ > + 0x1027, /* ConnectX-10 */ > + 0x2101, /* ConnectX-10 NVLink-C2C */ > + 0xa2d2, /* BlueField integrated ConnectX-5 */ > + 0xa2d3, /* BlueField integrated ConnectX-5 VF */ > + 0xa2d6, /* BlueField-2 integrated ConnectX-6 Dx */ > + 0xa2dc, /* BlueField-3 integrated ConnectX-7 */ > + 0xa2df, /* BlueField-4 integrated ConnectX-8 */ > + }; > + unsigned int i; > + u16 did; > + > + if (vfio_pci_config_readw(device, PCI_VENDOR_ID) != > + PCI_VENDOR_ID_MELLANOX) > + return -ENODEV; > + > + did = vfio_pci_config_readw(device, PCI_DEVICE_ID); > + for (i = 0; i < ARRAY_SIZE(mlx5st_pci_ids); i++) { > + if (mlx5st_pci_ids[i] == did) > + return 0; > + } > + > + return -ENODEV; > +}