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Sun, 17 May 2026 06:59:40 -0700 (PDT) Received: from FV6GYCPJ69 ([2001:1ae9:6084:ab00:4146:8430:fb4a:baf5]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-45d9e767ee0sm27899228f8f.1.2026.05.17.06.59.39 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 17 May 2026 06:59:40 -0700 (PDT) Date: Sun, 17 May 2026 15:59:37 +0200 From: Jiri Pirko To: Leon Romanovsky Cc: linux-rdma@vger.kernel.org, jgg@ziepe.ca, edwards@nvidia.com, kees@kernel.org, parav@nvidia.com, mbloch@nvidia.com, yishaih@nvidia.com, lirongqing@baidu.com, huangjunxian6@hisilicon.com, liuy22@mails.tsinghua.edu.cn, jmoroni@google.com Subject: Re: [PATCH rdma-next v2 2/2] RDMA/umem: block plain userspace memory registration under CoCo bounce Message-ID: References: <20260506111447.2697789-1-jiri@resnulli.us> <20260506111447.2697789-3-jiri@resnulli.us> <20260512130515.GV15586@unreal> <20260514162506.GR15586@unreal> <20260517115006.GG33515@unreal> Precedence: bulk X-Mailing-List: linux-rdma@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20260517115006.GG33515@unreal> Sun, May 17, 2026 at 01:50:06PM +0200, leon@kernel.org wrote: >On Fri, May 15, 2026 at 08:13:17AM +0200, Jiri Pirko wrote: >> Thu, May 14, 2026 at 06:25:06PM +0200, leon@kernel.org wrote: >> >On Tue, May 12, 2026 at 04:04:13PM +0200, Jiri Pirko wrote: >> >> Tue, May 12, 2026 at 03:05:15PM CEST, leon@kernel.org wrote: >> >> >On Wed, May 06, 2026 at 01:14:47PM +0200, Jiri Pirko wrote: >> >> >> From: Jiri Pirko >> >> >> >> >> >> When a device requires DMA bounce buffering inside a Confidential >> >> >> Computing guest, __ib_umem_get_va() cannot work. The DMA mapping layer >> >> >> redirects all mappings through swiotlb bounce buffers, so the device >> >> >> receives DMA addresses pointing to bounce buffer memory rather than >> >> >> the user's pages. Since RDMA devices access registered memory directly >> >> >> without CPU involvement, there is no opportunity for swiotlb to >> >> >> synchronize between the bounce buffer and the original pages. >> >> >> >> >> >> The registration would already fail later on, since the umem mapping >> >> >> is requested with DMA_ATTR_REQUIRE_COHERENT and gets rejected under >> >> >> is_swiotlb_force_bounce() with -EIO. Fail early with -EOPNOTSUPP >> >> >> instead, so the user gets a specific error code to react to. >> >> > >> >> >DMA_ATTR_REQUIRE_COHERENT was our answer to "layering violation claim". >> >> >> >> I'm not sure I follow. What's the issue you see? >> > >> >SWIOTLB is the layer below DMA API, RDMA is the layer above DMA API. >> >You shouldn't call to SWIOTLB functions in RDMA code. >> >> This patch doesn't do that. The patch description only describes the >> current situation and how the patch changes the behaviour. > >>From previous patch: >+ if (dma_device && >+ cc_platform_has(CC_ATTR_GUEST_MEM_ENCRYPT) && >+ is_swiotlb_force_bounce(dma_device)) >+ device->cc_dma_bounce = 1; > >And this patch reads cc_dma_bounce. Sure, I got that remark from the reply to the previous patch :) Already removed. Will send next v soon. Thanks!