From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Date: Thu, 14 Feb 2019 09:47:06 +0000 Message-ID: <86wom2snvp.wl-marc.zyngier@arm.com> From: Marc Zyngier Subject: Re: [PATCH v2 01/14] dt-bindings: remoteproc: Add TI PRUSS bindings In-Reply-To: <9c58bc48-90bf-8ac5-7fbd-0f6443e3fc5e@ti.com> References: <1549290167-876-1-git-send-email-rogerq@ti.com> <1549290167-876-2-git-send-email-rogerq@ti.com> <9c58bc48-90bf-8ac5-7fbd-0f6443e3fc5e@ti.com> MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") Content-Type: text/plain; charset=US-ASCII To: Suman Anna Cc: Linus Walleij , Roger Quadros , ext Tony Lindgren , Ohad Ben-Cohen , Bjorn Andersson , David Lechner , "Nori, Sekhar" , Tero Kristo , nsaulnier@ti.com, jreeder@ti.com, Murali Karicheri , woods.technical@gmail.com, Linux-OMAP , linux-remoteproc@vger.kernel.org, "linux-kernel@vger.kernel.org" , "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" List-ID: On Thu, 14 Feb 2019 03:12:29 +0000, Suman Anna wrote: > > On 2/8/19 7:51 AM, Linus Walleij wrote: > > On Mon, Feb 4, 2019 at 3:24 PM Roger Quadros wrote: > > > >> From: Suman Anna > >> > >> This patch adds the bindings for the Programmable Real-Time Unit > >> and Industrial Communication Subsystem (PRU-ICSS) present on various > >> SoCs such as AM33xx, AM437x, AM57xx, Keystone 66AK2G SoC, etc. It is > >> present on the Davinci based OMAPL138 SoCs and K3 architecture > >> based AM65x SoCs as well (not covered for now). > >> > >> Signed-off-by: Suman Anna > >> Signed-off-by: Roger Quadros > > > > (...) > >> + pruss_intc: intc@20000 { > >> + compatible = "ti,am3356-pruss-intc"; > >> + reg = <0x20000 0x2000>; > >> + reg-names = "intc"; > >> + interrupt-controller; > >> + #interrupt-cells = <1>; > >> + interrupts = <20 21 22 23 24 25 26 27>; > >> + interrupt-names = "host2", "host3", "host4", > >> + "host5", "host6", "host7", > >> + "host8", "host9"; > > > > If thsese interrupts are mapped 1-to-1 to a parent interrupt controller > > then this is a hierarchical interrupt domain and then these should > > be handled locally in the driver as offset from child to parent > > statically encoded in the driver. > > > > Several old drivers and old device tree bindings make this kind > > of maps, but it is not how we do it anymore, if we can avoid it. > > > > To be able to use hierarchical interrupt domain in the kernel, the top > > interrupt controller must use the hierarchical (v2) irqdomain, so > > if this is anything else than the ARM GIC it will be an interesting > > undertaking to handle this. > > These are interrupt lines coming towards the host processor running > Linux and are directly connected to the ARM GIC. This INTC module is > actually an PRUSS internal interrupt controller that can take in 64 (on > most SoCs) external events/interrupt sources and multiplexing them > through two layers of many-to-one events-to-intr channels & > intr-channels-to-host interrupts. Couple of the host interrupts go to > the PRU cores themselves while the remaining ones come out of the IP to > connect to other GICs in the SoC. If your many-to-one are anything like a router, then please implement this as an hierarchy, and not as a chained interrupt controller. The only reason to use a chained interrupt controller is when the Linux sees a single interrupt representing a number of cascaded signals, and has to demux it in SW. From what I can tell, this is not the case here. Thanks, M. -- Jazz is not dead, it just smell funny.