From: Krzysztof Kozlowski <krzk@kernel.org>
To: george.moussalem@outlook.com,
Bjorn Andersson <andersson@kernel.org>,
Konrad Dybcio <konradybcio@kernel.org>,
Mathieu Poirier <mathieu.poirier@linaro.org>,
Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Manikanta Mylavarapu <quic_mmanikan@quicinc.com>,
Jassi Brar <jassisinghbrar@gmail.com>
Cc: linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-remoteproc@vger.kernel.org, devicetree@vger.kernel.org,
Gokul Sriram Palanisamy <quic_gokulsri@quicinc.com>
Subject: Re: [PATCH v7 2/8] dt-bindings: remoteproc: qcom: document hexagon based WCSS secure PIL
Date: Sat, 20 Dec 2025 09:42:07 +0100 [thread overview]
Message-ID: <c4b295de-d1d6-4cd9-bbbc-72a17aae788a@kernel.org> (raw)
In-Reply-To: <20251215-ipq5018-wifi-v7-2-ec4adba941b5@outlook.com>
On 15/12/2025 07:35, George Moussalem via B4 Relay wrote:
> From: Manikanta Mylavarapu <quic_mmanikan@quicinc.com>
>
> Add new binding document for hexagon based WCSS secure PIL remoteproc.
> IPQ5018, IPQ5332, IPQ5424 and IPQ9574 follow secure PIL remoteproc.
>
> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
> Signed-off-by: Manikanta Mylavarapu <quic_mmanikan@quicinc.com>
> Signed-off-by: Gokul Sriram Palanisamy <quic_gokulsri@quicinc.com>
What is with this SoB chain? It's incomplete or incorrect - where is the
sender's SoB?
Best regards,
Krzysztof
next prev parent reply other threads:[~2025-12-20 8:42 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-12-15 6:35 [PATCH v7 0/8] Add new driver for WCSS secure PIL loading George Moussalem via B4 Relay
2025-12-15 6:35 ` [PATCH v7 1/8] firmware: qcom_scm: ipq5332: add support to pass metadata size George Moussalem via B4 Relay
2025-12-15 6:35 ` [PATCH v7 2/8] dt-bindings: remoteproc: qcom: document hexagon based WCSS secure PIL George Moussalem via B4 Relay
2025-12-20 8:42 ` Krzysztof Kozlowski [this message]
2025-12-15 6:35 ` [PATCH v7 3/8] remoteproc: qcom: add hexagon based WCSS secure PIL driver George Moussalem via B4 Relay
2025-12-15 6:35 ` [PATCH v7 4/8] mailbox: qcom: fix IPC register offset for IPQ5424 George Moussalem via B4 Relay
2025-12-18 4:28 ` Bjorn Andersson
2025-12-15 6:35 ` [PATCH v7 5/8] arm64: dts: qcom: ipq5018: add nodes to bring up q6 George Moussalem via B4 Relay
2025-12-15 6:35 ` [PATCH v7 6/8] arm64: dts: qcom: ipq5332: " George Moussalem via B4 Relay
2025-12-15 20:51 ` Dmitry Baryshkov
2025-12-15 6:35 ` [PATCH v7 7/8] arm64: dts: qcom: ipq5424: " George Moussalem via B4 Relay
2025-12-15 20:52 ` Dmitry Baryshkov
2025-12-15 6:35 ` [PATCH v7 8/8] arm64: dts: qcom: ipq9574: " George Moussalem via B4 Relay
2025-12-15 20:52 ` Dmitry Baryshkov
2025-12-17 10:16 ` [PATCH v7 0/8] Add new driver for WCSS secure PIL loading Varadarajan Narayanan
2025-12-17 11:01 ` George Moussalem
2025-12-18 3:54 ` Varadarajan Narayanan
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