[PATCH 0/4] ARM: dts: rcar-gen2: Correct SCIFB reg properties to cover all

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* [PATCH 0/4] ARM: dts: rcar-gen2: Correct SCIFB reg properties to cover all
@ 2016-09-19 14:18 Geert Uytterhoeven
  2016-09-19 14:18 ` [PATCH 1/4] ARM: dts: r8a7790: Correct SCIFB reg properties to cover all registers Geert Uytterhoeven
                   ` (4 more replies)
  0 siblings, 5 replies; 6+ messages in thread
From: Geert Uytterhoeven @ 2016-09-19 14:18 UTC (permalink / raw)
  To: Simon Horman, Magnus Damm; +Cc: linux-renesas-soc, Geert Uytterhoeven

	Hi Simon, Magnus,

Several SCIFB registers reside outside the register ranges as specified
by the "reg" properties of the various R-Car Gen2 DTSes.  Fortunately
this works (on Linux), due to the PAGE_SIZE granularity of ioremap().

Extend the sizes from 64 to 0x100 bytes to fix this, like is done on
SH/R-Mobile SoCs.

Thanks for applying!

Geert Uytterhoeven (4):
  ARM: dts: r8a7790: Correct SCIFB reg properties to cover all registers
  ARM: dts: r8a7791: Correct SCIFB reg properties to cover all registers
  ARM: dts: r8a7793: Correct SCIFB reg properties to cover all registers
  ARM: dts: r8a7794: Correct SCIFB reg properties to cover all registers

 arch/arm/boot/dts/r8a7790.dtsi | 6 +++---
 arch/arm/boot/dts/r8a7791.dtsi | 6 +++---
 arch/arm/boot/dts/r8a7793.dtsi | 6 +++---
 arch/arm/boot/dts/r8a7794.dtsi | 6 +++---
 4 files changed, 12 insertions(+), 12 deletions(-)

-- 
1.9.1

Gr{oetje,eeting}s,

						Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
							    -- Linus Torvalds

^ permalink raw reply	[flat|nested] 6+ messages in thread

* [PATCH 1/4] ARM: dts: r8a7790: Correct SCIFB reg properties to cover all registers
  2016-09-19 14:18 [PATCH 0/4] ARM: dts: rcar-gen2: Correct SCIFB reg properties to cover all Geert Uytterhoeven
@ 2016-09-19 14:18 ` Geert Uytterhoeven
  2016-09-19 14:18 ` [PATCH 2/4] ARM: dts: r8a7791: " Geert Uytterhoeven
                   ` (3 subsequent siblings)
  4 siblings, 0 replies; 6+ messages in thread
From: Geert Uytterhoeven @ 2016-09-19 14:18 UTC (permalink / raw)
  To: Simon Horman, Magnus Damm; +Cc: linux-renesas-soc, Geert Uytterhoeven

Several SCIFB registers reside outside the reported register ranges.
Fortunately this works (on Linux), due to the PAGE_SIZE granularity of
ioremap().

Extend the sizes from 64 to 0x100 bytes to fix this, like is done on
SH/R-Mobile SoCs.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
 arch/arm/boot/dts/r8a7790.dtsi | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/arch/arm/boot/dts/r8a7790.dtsi b/arch/arm/boot/dts/r8a7790.dtsi
index 3f10b0bf1b08fa89..9f60b737ca297ce6 100644
--- a/arch/arm/boot/dts/r8a7790.dtsi
+++ b/arch/arm/boot/dts/r8a7790.dtsi
@@ -711,7 +711,7 @@
 	scifb0: serial@e6c20000 {
 		compatible = "renesas,scifb-r8a7790",
 			     "renesas,rcar-gen2-scifb", "renesas,scifb";
-		reg = <0 0xe6c20000 0 64>;
+		reg = <0 0xe6c20000 0 0x100>;
 		interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
 		clocks = <&mstp2_clks R8A7790_CLK_SCIFB0>;
 		clock-names = "fck";
@@ -725,7 +725,7 @@
 	scifb1: serial@e6c30000 {
 		compatible = "renesas,scifb-r8a7790",
 			     "renesas,rcar-gen2-scifb", "renesas,scifb";
-		reg = <0 0xe6c30000 0 64>;
+		reg = <0 0xe6c30000 0 0x100>;
 		interrupts = <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>;
 		clocks = <&mstp2_clks R8A7790_CLK_SCIFB1>;
 		clock-names = "fck";
@@ -739,7 +739,7 @@
 	scifb2: serial@e6ce0000 {
 		compatible = "renesas,scifb-r8a7790",
 			     "renesas,rcar-gen2-scifb", "renesas,scifb";
-		reg = <0 0xe6ce0000 0 64>;
+		reg = <0 0xe6ce0000 0 0x100>;
 		interrupts = <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
 		clocks = <&mstp2_clks R8A7790_CLK_SCIFB2>;
 		clock-names = "fck";
-- 
1.9.1

^ permalink raw reply related	[flat|nested] 6+ messages in thread

* [PATCH 2/4] ARM: dts: r8a7791: Correct SCIFB reg properties to cover all registers
  2016-09-19 14:18 [PATCH 0/4] ARM: dts: rcar-gen2: Correct SCIFB reg properties to cover all Geert Uytterhoeven
  2016-09-19 14:18 ` [PATCH 1/4] ARM: dts: r8a7790: Correct SCIFB reg properties to cover all registers Geert Uytterhoeven
@ 2016-09-19 14:18 ` Geert Uytterhoeven
  2016-09-19 14:18 ` [PATCH 3/4] ARM: dts: r8a7793: " Geert Uytterhoeven
                   ` (2 subsequent siblings)
  4 siblings, 0 replies; 6+ messages in thread
From: Geert Uytterhoeven @ 2016-09-19 14:18 UTC (permalink / raw)
  To: Simon Horman, Magnus Damm; +Cc: linux-renesas-soc, Geert Uytterhoeven

Several SCIFB registers reside outside the reported register ranges.
Fortunately this works (on Linux), due to the PAGE_SIZE granularity of
ioremap().

Extend the sizes from 64 to 0x100 bytes to fix this, like is done on
SH/R-Mobile SoCs.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
 arch/arm/boot/dts/r8a7791.dtsi | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/arch/arm/boot/dts/r8a7791.dtsi b/arch/arm/boot/dts/r8a7791.dtsi
index 4e64be751bf2dafa..5d81a2d1c88434f2 100644
--- a/arch/arm/boot/dts/r8a7791.dtsi
+++ b/arch/arm/boot/dts/r8a7791.dtsi
@@ -702,7 +702,7 @@
 	scifb0: serial@e6c20000 {
 		compatible = "renesas,scifb-r8a7791",
 			     "renesas,rcar-gen2-scifb", "renesas,scifb";
-		reg = <0 0xe6c20000 0 64>;
+		reg = <0 0xe6c20000 0 0x100>;
 		interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
 		clocks = <&mstp2_clks R8A7791_CLK_SCIFB0>;
 		clock-names = "fck";
@@ -716,7 +716,7 @@
 	scifb1: serial@e6c30000 {
 		compatible = "renesas,scifb-r8a7791",
 			     "renesas,rcar-gen2-scifb", "renesas,scifb";
-		reg = <0 0xe6c30000 0 64>;
+		reg = <0 0xe6c30000 0 0x100>;
 		interrupts = <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>;
 		clocks = <&mstp2_clks R8A7791_CLK_SCIFB1>;
 		clock-names = "fck";
@@ -730,7 +730,7 @@
 	scifb2: serial@e6ce0000 {
 		compatible = "renesas,scifb-r8a7791",
 			     "renesas,rcar-gen2-scifb", "renesas,scifb";
-		reg = <0 0xe6ce0000 0 64>;
+		reg = <0 0xe6ce0000 0 0x100>;
 		interrupts = <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
 		clocks = <&mstp2_clks R8A7791_CLK_SCIFB2>;
 		clock-names = "fck";
-- 
1.9.1

^ permalink raw reply related	[flat|nested] 6+ messages in thread

* [PATCH 3/4] ARM: dts: r8a7793: Correct SCIFB reg properties to cover all registers
  2016-09-19 14:18 [PATCH 0/4] ARM: dts: rcar-gen2: Correct SCIFB reg properties to cover all Geert Uytterhoeven
  2016-09-19 14:18 ` [PATCH 1/4] ARM: dts: r8a7790: Correct SCIFB reg properties to cover all registers Geert Uytterhoeven
  2016-09-19 14:18 ` [PATCH 2/4] ARM: dts: r8a7791: " Geert Uytterhoeven
@ 2016-09-19 14:18 ` Geert Uytterhoeven
  2016-09-19 14:18 ` [PATCH 4/4] ARM: dts: r8a7794: " Geert Uytterhoeven
  2016-09-20  9:20 ` [PATCH 0/4] ARM: dts: rcar-gen2: Correct SCIFB reg properties to cover all Simon Horman
  4 siblings, 0 replies; 6+ messages in thread
From: Geert Uytterhoeven @ 2016-09-19 14:18 UTC (permalink / raw)
  To: Simon Horman, Magnus Damm; +Cc: linux-renesas-soc, Geert Uytterhoeven

Several SCIFB registers reside outside the reported register ranges.
Fortunately this works (on Linux), due to the PAGE_SIZE granularity of
ioremap().

Extend the sizes from 64 to 0x100 bytes to fix this, like is done on
SH/R-Mobile SoCs.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
 arch/arm/boot/dts/r8a7793.dtsi | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/arch/arm/boot/dts/r8a7793.dtsi b/arch/arm/boot/dts/r8a7793.dtsi
index e4b385eccf74e95e..67db1f7025c54c77 100644
--- a/arch/arm/boot/dts/r8a7793.dtsi
+++ b/arch/arm/boot/dts/r8a7793.dtsi
@@ -666,7 +666,7 @@
 	scifb0: serial@e6c20000 {
 		compatible = "renesas,scifb-r8a7793",
 			     "renesas,rcar-gen2-scifb", "renesas,scifb";
-		reg = <0 0xe6c20000 0 64>;
+		reg = <0 0xe6c20000 0 0x100>;
 		interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
 		clocks = <&mstp2_clks R8A7793_CLK_SCIFB0>;
 		clock-names = "fck";
@@ -680,7 +680,7 @@
 	scifb1: serial@e6c30000 {
 		compatible = "renesas,scifb-r8a7793",
 			     "renesas,rcar-gen2-scifb", "renesas,scifb";
-		reg = <0 0xe6c30000 0 64>;
+		reg = <0 0xe6c30000 0 0x100>;
 		interrupts = <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>;
 		clocks = <&mstp2_clks R8A7793_CLK_SCIFB1>;
 		clock-names = "fck";
@@ -694,7 +694,7 @@
 	scifb2: serial@e6ce0000 {
 		compatible = "renesas,scifb-r8a7793",
 			     "renesas,rcar-gen2-scifb", "renesas,scifb";
-		reg = <0 0xe6ce0000 0 64>;
+		reg = <0 0xe6ce0000 0 0x100>;
 		interrupts = <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
 		clocks = <&mstp2_clks R8A7793_CLK_SCIFB2>;
 		clock-names = "fck";
-- 
1.9.1

^ permalink raw reply related	[flat|nested] 6+ messages in thread

* [PATCH 4/4] ARM: dts: r8a7794: Correct SCIFB reg properties to cover all registers
  2016-09-19 14:18 [PATCH 0/4] ARM: dts: rcar-gen2: Correct SCIFB reg properties to cover all Geert Uytterhoeven
                   ` (2 preceding siblings ...)
  2016-09-19 14:18 ` [PATCH 3/4] ARM: dts: r8a7793: " Geert Uytterhoeven
@ 2016-09-19 14:18 ` Geert Uytterhoeven
  2016-09-20  9:20 ` [PATCH 0/4] ARM: dts: rcar-gen2: Correct SCIFB reg properties to cover all Simon Horman
  4 siblings, 0 replies; 6+ messages in thread
From: Geert Uytterhoeven @ 2016-09-19 14:18 UTC (permalink / raw)
  To: Simon Horman, Magnus Damm; +Cc: linux-renesas-soc, Geert Uytterhoeven

Several SCIFB registers reside outside the reported register ranges.
Fortunately this works (on Linux), due to the PAGE_SIZE granularity of
ioremap().

Extend the sizes from 64 to 0x100 bytes to fix this, like is done on
SH/R-Mobile SoCs.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
 arch/arm/boot/dts/r8a7794.dtsi | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/arch/arm/boot/dts/r8a7794.dtsi b/arch/arm/boot/dts/r8a7794.dtsi
index 73365894043659bb..1e7157da4e69a2af 100644
--- a/arch/arm/boot/dts/r8a7794.dtsi
+++ b/arch/arm/boot/dts/r8a7794.dtsi
@@ -411,7 +411,7 @@
 	scifb0: serial@e6c20000 {
 		compatible = "renesas,scifb-r8a7794",
 			     "renesas,rcar-gen2-scifb", "renesas,scifb";
-		reg = <0 0xe6c20000 0 64>;
+		reg = <0 0xe6c20000 0 0x100>;
 		interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
 		clocks = <&mstp2_clks R8A7794_CLK_SCIFB0>;
 		clock-names = "fck";
@@ -425,7 +425,7 @@
 	scifb1: serial@e6c30000 {
 		compatible = "renesas,scifb-r8a7794",
 			     "renesas,rcar-gen2-scifb", "renesas,scifb";
-		reg = <0 0xe6c30000 0 64>;
+		reg = <0 0xe6c30000 0 0x100>;
 		interrupts = <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>;
 		clocks = <&mstp2_clks R8A7794_CLK_SCIFB1>;
 		clock-names = "fck";
@@ -439,7 +439,7 @@
 	scifb2: serial@e6ce0000 {
 		compatible = "renesas,scifb-r8a7794",
 			     "renesas,rcar-gen2-scifb", "renesas,scifb";
-		reg = <0 0xe6ce0000 0 64>;
+		reg = <0 0xe6ce0000 0 0x100>;
 		interrupts = <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
 		clocks = <&mstp2_clks R8A7794_CLK_SCIFB2>;
 		clock-names = "fck";
-- 
1.9.1

^ permalink raw reply related	[flat|nested] 6+ messages in thread

* Re: [PATCH 0/4] ARM: dts: rcar-gen2: Correct SCIFB reg properties to cover all
  2016-09-19 14:18 [PATCH 0/4] ARM: dts: rcar-gen2: Correct SCIFB reg properties to cover all Geert Uytterhoeven
                   ` (3 preceding siblings ...)
  2016-09-19 14:18 ` [PATCH 4/4] ARM: dts: r8a7794: " Geert Uytterhoeven
@ 2016-09-20  9:20 ` Simon Horman
  4 siblings, 0 replies; 6+ messages in thread
From: Simon Horman @ 2016-09-20  9:20 UTC (permalink / raw)
  To: Geert Uytterhoeven; +Cc: Magnus Damm, linux-renesas-soc

On Mon, Sep 19, 2016 at 04:18:52PM +0200, Geert Uytterhoeven wrote:
> 	Hi Simon, Magnus,
> 
> Several SCIFB registers reside outside the register ranges as specified
> by the "reg" properties of the various R-Car Gen2 DTSes.  Fortunately
> this works (on Linux), due to the PAGE_SIZE granularity of ioremap().
> 
> Extend the sizes from 64 to 0x100 bytes to fix this, like is done on
> SH/R-Mobile SoCs.

Thanks, I have queued these up.

^ permalink raw reply	[flat|nested] 6+ messages in thread

end of thread, other threads:[~2016-09-20  9:20 UTC | newest]

Thread overview: 6+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2016-09-19 14:18 [PATCH 0/4] ARM: dts: rcar-gen2: Correct SCIFB reg properties to cover all Geert Uytterhoeven
2016-09-19 14:18 ` [PATCH 1/4] ARM: dts: r8a7790: Correct SCIFB reg properties to cover all registers Geert Uytterhoeven
2016-09-19 14:18 ` [PATCH 2/4] ARM: dts: r8a7791: " Geert Uytterhoeven
2016-09-19 14:18 ` [PATCH 3/4] ARM: dts: r8a7793: " Geert Uytterhoeven
2016-09-19 14:18 ` [PATCH 4/4] ARM: dts: r8a7794: " Geert Uytterhoeven
2016-09-20  9:20 ` [PATCH 0/4] ARM: dts: rcar-gen2: Correct SCIFB reg properties to cover all Simon Horman

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