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Mon, 17 Aug 2026 10:40:29 +0000 (UTC) Content-Type: text/plain; charset="utf-8" Precedence: bulk X-Mailing-List: linux-renesas-soc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Subject: Patchwork summary for: linux-renesas-soc From: patchwork-bot+linux-renesas-soc@kernel.org Message-Id: <178696322796.1067832.4453063453232887588.git-patchwork-summary@kernel.org> Date: Mon, 17 Aug 2026 10:40:27 +0000 To: linux-renesas-soc@vger.kernel.org Hello: The following patches were marked "mainlined", because they were applied to geert/renesas-devel.git (master): Series: Fix GBETH TX scheduling policy for RZ/{V2H, V2N, G3E, T2H, N2H} Submitter: Ovidiu Panait Committer: Geert Uytterhoeven Patchwork: https://patchwork.kernel.org/project/linux-renesas-soc/list/?series=1132269 Lore link: https://lore.kernel.org/r/20260722085353.136986-1-ovidiu.panait.rb@renesas.com Patches: [1/5] arm64: dts: renesas: r9a09g057: Switch GBETH TX queue scheduling to WRR [2/5] arm64: dts: renesas: r9a09g056: Switch GBETH TX queue scheduling to WRR [3/5] arm64: dts: renesas: r9a09g047: Switch GBETH TX queue scheduling to WRR [4/5] arm64: dts: renesas: r9a09g077: Switch GBETH TX queue scheduling to WRR [5/5] arm64: dts: renesas: r9a09g078: Switch GBETH TX queue scheduling to WRR Series: soc: renesas: mfis: add hwspinlock support Submitter: Wolfram Sang Committer: Geert Uytterhoeven Patchwork: https://patchwork.kernel.org/project/linux-renesas-soc/list/?series=1130131 Lore link: https://lore.kernel.org/r/20260718182355.50045-1-wsa+renesas@sang-engineering.com Patches: [v2,1/2] soc: renesas: rcar-mfis: convert spinlock to raw_spinlock Series: Add DU, VSPD and FCPVD support for RZ/T2H and RZ/N2H SoCs Submitter: Lad, Prabhakar Committer: Geert Uytterhoeven Patchwork: https://patchwork.kernel.org/project/linux-renesas-soc/list/?series=1111646 Lore link: https://lore.kernel.org/r/20260615115455.1412098-1-prabhakar.mahadev-lad.rj@bp.renesas.com Patches: [v2,1/5] arm64: dts: renesas: r9a09g077: Add VSPD and FCPVD nodes [v2,2/5] arm64: dts: renesas: r9a09g077: Add DU node [v2,3/5] arm64: dts: renesas: r9a09g087: Add VSPD and FCPVD nodes [v2,4/5] arm64: dts: renesas: r9a09g087: Add DU node Series: Add GFX support for RZ/G3L SoC Submitter: Biju Patchwork: https://patchwork.kernel.org/project/linux-renesas-soc/list/?series=1106059 Lore link: https://lore.kernel.org/r/20260604151855.307772-1-biju.das.jz@bp.renesas.com Patches: [1/3] clk: renesas: r9a08g046: Add clock and reset entries for GE3D [2/3] arm64: dts: renesas: r9a08g046: Add Mali-G31 GPU node [3/3] arm64: dts: renesas: rzg3l-smarc-som: Enable Mali-G31 Series: pinctrl: renesas: rzg2l: Add support for RZ/G3S I3C Submitter: Claudiu Beznea Patchwork: https://patchwork.kernel.org/project/linux-renesas-soc/list/?series=1105399 Lore link: https://lore.kernel.org/r/20260603151642.4075678-1-claudiu.beznea@kernel.org Patches: [v3,1/6] pinctrl: renesas: rzg2l: Use raw_spinlock_irqsave() on power source update [v3,6/6] arm64: dts: renesas: rzg3s-smarc-som: Enable I3C Series: pinctrl: renesas: rzg2l: Add support for RZ/G3S I3C Submitter: Claudiu Beznea Patchwork: https://patchwork.kernel.org/project/linux-renesas-soc/list/?series=1125378 Lore link: https://lore.kernel.org/r/20260710113637.1328000-1-claudiu.beznea+renesas@tuxon.dev Patches: [v4,1/5] pinctrl: renesas: rzg2l: Generalize the power source code [v4,5/5] arm64: dts: renesas: rzg3s-smarc-som: Enable I3C Patch: arm64: dts: renesas: r9a08g045: Move max-frequency to SoC dtsi Submitter: Biju Committer: Geert Uytterhoeven Patchwork: https://patchwork.kernel.org/project/linux-renesas-soc/list/?series=1113802 Lore link: https://lore.kernel.org/r/20260619075621.126961-1-biju.das.jz@bp.renesas.com Total patches: 18 -- Deet-doot-dot, I am a bot. https://korg.docs.kernel.org/patchwork/pwbot.html