From: Stephen Boyd <sboyd@codeaurora.org>
To: Geert Uytterhoeven <geert+renesas@glider.be>
Cc: Michael Turquette <mturquette@baylibre.com>,
linux-clk@vger.kernel.org, linux-renesas-soc@vger.kernel.org,
Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>,
stable@vger.kernel.org
Subject: Re: [PATCH] clk: renesas: r8a7795: Fix SD clocks
Date: Thu, 11 Aug 2016 18:16:48 -0700 [thread overview]
Message-ID: <20160812011648.GN2996@codeaurora.org> (raw)
In-Reply-To: <1470814183-17834-1-git-send-email-geert+renesas@glider.be>
On 08/10, Geert Uytterhoeven wrote:
> From: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
>
> According to the datasheet, SDn clocks are from the SDSRC clock. And
> the SDSRC has a 1/2 divider. So, we should have ".sdsrc" as an internal
> core clock. Otherwise, since the sdhi driver will calculate clock for
> a sd card using the wrong parent clock rate, and then performance will
> be not good.
>
> Fixes: 90c073e53909da85 ("clk: shmobile: r8a7795: Add SD divider support")
> Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
> Acked-by: Dirk Behme <dirk.behme@de.bosch.com>
> Tested-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
> Cc: stable@vger.kernel.org
> ---
Applied to clk-fixes
--
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project
next prev parent reply other threads:[~2016-08-12 1:16 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-08-10 7:29 [PATCH] clk: renesas: r8a7795: Fix SD clocks Geert Uytterhoeven
2016-08-11 8:57 ` Simon Horman
2016-08-11 9:21 ` Simon Horman
2016-08-12 1:16 ` Stephen Boyd [this message]
-- strict thread matches above, loose matches on Subject: below --
2016-07-13 3:20 Yoshihiro Shimoda
2016-07-18 10:53 ` Geert Uytterhoeven
2016-07-19 8:21 ` Dirk Behme
2016-07-20 12:06 ` Wolfram Sang
2016-07-21 16:57 ` Wolfram Sang
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