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Date: Fri, 28 Oct 2016 15:50:21 +0200
From: Simon Horman <horms@verge.net.au>
To: Magnus Damm <magnus.damm@gmail.com>
Cc: Ulrich Hecht <ulrich.hecht+renesas@gmail.com>,
        Linux-Renesas <linux-renesas-soc@vger.kernel.org>,
        Geert Uytterhoeven <geert@linux-m68k.org>
Subject: Re: [PATCH 0/3] r8a7796 SYS-DMAC integration
Message-ID: <20161028135019.GD4041@verge.net.au>
References: <20160914164549.31121-1-ulrich.hecht+renesas@gmail.com>
 <CANqRtoS1x3vYsAOR1cvxOUdQ0f-6ppE2_7sZx580FqB7WwmBwQ@mail.gmail.com>
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On Fri, Oct 28, 2016 at 06:12:37PM +0900, Magnus Damm wrote:
> Hi Ulrich, Simon, everyone,
> 
> On Thu, Sep 15, 2016 at 1:45 AM, Ulrich Hecht
> <ulrich.hecht+renesas@gmail.com> wrote:
> > Hi!
> >
> > This enables the three DMA controllers. Identical to the setup on r8a7795.
> > Based on renesas-drivers-2016-09-13-v4.8-rc6.
> >
> > CU
> > Uli
> >
> >
> > Ulrich Hecht (3):
> >   clk: renesas: r8a7796: Add SYS-DMAC clocks
> >   arm64: renesas: r8a7796: add SYS-DMAC controller nodes
> >   dmaengine: rcar-dmac: Document R-Car M3-W bindings
> 
> Thanks for your efforts. I noticed that the clock bits have been
> queued up by Geert, but other parts seem to be missing.
> 
> Can you please ping/poke/resend or whatever is needed to move the rest
> of the series forward?

I'm happy to queue up the arm64 patch (which Ulrich recently pinged me
about). But I wanted to first confirm that it doesn't haven any
implications for enabling 64bit memory.