From: "Niklas Söderlund" <niklas.soderlund@ragnatech.se>
To: Wolfram Sang <wsa+renesas@sang-engineering.com>,
Masahiro Yamada <yamada.masahiro@socionext.com>,
Ulf Hansson <ulf.hansson@linaro.org>,
linux-mmc@vger.kernel.org
Cc: linux-renesas-soc@vger.kernel.org,
"Niklas Söderlund" <niklas.soderlund+renesas@ragnatech.se>
Subject: [PATCH v2 3/3] mmc: renesas_sdhi: disable HS400 on H3 ES1.x and M3-W ES1.x
Date: Thu, 1 Nov 2018 00:13:40 +0100 [thread overview]
Message-ID: <20181031231340.1958-4-niklas.soderlund@ragnatech.se> (raw)
In-Reply-To: <20181031231340.1958-1-niklas.soderlund@ragnatech.se>
From: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
The Renesas BSP confirms that H3 ES1.x and M3-W ES1.x do not properly
support HS400. Add a quirk to indicate this and disable HS400 in the MMC
capabilities if the quirk is set.
Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
---
drivers/mmc/host/renesas_sdhi_core.c | 20 +++++++++++++++-----
1 file changed, 15 insertions(+), 5 deletions(-)
diff --git a/drivers/mmc/host/renesas_sdhi_core.c b/drivers/mmc/host/renesas_sdhi_core.c
index 19d89b4dda64c13c..ed2c406fd62b5c7d 100644
--- a/drivers/mmc/host/renesas_sdhi_core.c
+++ b/drivers/mmc/host/renesas_sdhi_core.c
@@ -47,6 +47,7 @@
#define SDHI_VER_GEN3_SDMMC 0xcd10
struct renesas_sdhi_quirks {
+ bool hs400_disabled;
bool hs400_4taps;
};
@@ -607,15 +608,21 @@ static void renesas_sdhi_enable_dma(struct tmio_mmc_host *host, bool enable)
renesas_sdhi_sdbuf_width(host, enable ? width : 16);
}
-static const struct renesas_sdhi_quirks sdhi_quirks_h3_m3w = {
+static const struct renesas_sdhi_quirks sdhi_quirks_h3_m3w_es1 = {
+ .hs400_disabled = true,
+ .hs400_4taps = true,
+};
+
+static const struct renesas_sdhi_quirks sdhi_quirks_h3_es2 = {
+ .hs400_disabled = false,
.hs400_4taps = true,
};
static const struct soc_device_attribute sdhi_quirks_match[] = {
- { .soc_id = "r8a7795", .revision = "ES1.*", .data = &sdhi_quirks_h3_m3w },
- { .soc_id = "r8a7795", .revision = "ES2.0", .data = &sdhi_quirks_h3_m3w },
- { .soc_id = "r8a7796", .revision = "ES1.0", .data = &sdhi_quirks_h3_m3w },
- { .soc_id = "r8a7796", .revision = "ES1.1", .data = &sdhi_quirks_h3_m3w },
+ { .soc_id = "r8a7795", .revision = "ES1.*", .data = &sdhi_quirks_h3_m3w_es1 },
+ { .soc_id = "r8a7795", .revision = "ES2.0", .data = &sdhi_quirks_h3_es2 },
+ { .soc_id = "r8a7796", .revision = "ES1.0", .data = &sdhi_quirks_h3_m3w_es1 },
+ { .soc_id = "r8a7796", .revision = "ES1.1", .data = &sdhi_quirks_h3_m3w_es1 },
{ /* Sentinel. */ },
};
@@ -704,6 +711,9 @@ int renesas_sdhi_probe(struct platform_device *pdev,
host->multi_io_quirk = renesas_sdhi_multi_io_quirk;
host->dma_ops = dma_ops;
+ if (quirks && quirks->hs400_disabled)
+ host->mmc->caps2 &= ~(MMC_CAP2_HS400 | MMC_CAP2_HS400_ES);
+
if (quirks && quirks->hs400_4taps)
mmc_data->flags |= TMIO_MMC_HAVE_4TAP_HS400;
--
2.19.1
next prev parent reply other threads:[~2018-11-01 8:15 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-10-31 23:13 [PATCH v2 0/3] mmc: renesas_sdhi: extend quirk selection to handle ES revisions Niklas Söderlund
2018-10-31 23:13 ` [PATCH v2 1/3] mmc: renesas_sdhi: handle 4tap hs400 mode quirk based on SoC revision Niklas Söderlund
2018-11-01 19:31 ` Wolfram Sang
2018-11-05 12:17 ` Geert Uytterhoeven
2018-10-31 23:13 ` [PATCH v2 2/3] mmc: renesas_sdhi: align compatibility properties for H3 and M3-W Niklas Söderlund
2018-11-01 19:32 ` Wolfram Sang
2018-10-31 23:13 ` Niklas Söderlund [this message]
2018-11-01 19:32 ` [PATCH v2 3/3] mmc: renesas_sdhi: disable HS400 on H3 ES1.x and M3-W ES1.x Wolfram Sang
2018-11-05 12:20 ` Geert Uytterhoeven
2018-11-01 19:34 ` [PATCH v2 0/3] mmc: renesas_sdhi: extend quirk selection to handle ES revisions Wolfram Sang
2018-11-02 11:54 ` Simon Horman
2018-11-01 19:36 ` Wolfram Sang
2018-11-19 12:08 ` Ulf Hansson
2018-11-19 12:15 ` Wolfram Sang
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