From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.4 required=3.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,USER_AGENT_SANE_1 autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 79438ECE587 for ; Tue, 1 Oct 2019 18:11:50 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 4790B20B7C for ; Tue, 1 Oct 2019 18:11:50 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=ideasonboard.com header.i=@ideasonboard.com header.b="BdFgBDBf" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1731461AbfJASLu (ORCPT ); Tue, 1 Oct 2019 14:11:50 -0400 Received: from perceval.ideasonboard.com ([213.167.242.64]:52690 "EHLO perceval.ideasonboard.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727345AbfJASLt (ORCPT ); Tue, 1 Oct 2019 14:11:49 -0400 Received: from pendragon.ideasonboard.com (modemcable151.96-160-184.mc.videotron.ca [184.160.96.151]) by perceval.ideasonboard.com (Postfix) with ESMTPSA id 8240C23F; Tue, 1 Oct 2019 20:11:46 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ideasonboard.com; s=mail; t=1569953507; bh=1HV+NKrply/jtpF9YUXpvlwczOCbNiRqingnW6DmXkE=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=BdFgBDBfQUWJNUepRw6g5fwqDpP3L/BSm3b4MoCzb9m2HQd43DtCX2HH4lPLVmizP Ir39CNZt9oyD5FEfjwjxbmcdnQw8sAAIEMf60o7IGHLSa1olUSNPsDs/yTPRUPEB6q R0v4+qIrUVk3FoA2SZL7AvyPFuHobcKZ94QFDHWA= Date: Tue, 1 Oct 2019 21:11:34 +0300 From: Laurent Pinchart To: Biju Das Cc: Rob Herring , Mark Rutland , Simon Horman , Kieran Bingham , Geert Uytterhoeven , Magnus Damm , linux-renesas-soc@vger.kernel.org, devicetree@vger.kernel.org, Chris Paterson , Fabrizio Castro Subject: Re: [PATCH 1/8] arm64: dts: renesas: hihope-common: Move du clk properties out of common dtsi Message-ID: <20191001181134.GC4735@pendragon.ideasonboard.com> References: <1569932124-32010-1-git-send-email-biju.das@bp.renesas.com> <1569932124-32010-2-git-send-email-biju.das@bp.renesas.com> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline In-Reply-To: <1569932124-32010-2-git-send-email-biju.das@bp.renesas.com> User-Agent: Mutt/1.10.1 (2018-07-13) Sender: linux-renesas-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-renesas-soc@vger.kernel.org Hi Biju, Thank you for the patch. On Tue, Oct 01, 2019 at 01:15:17PM +0100, Biju Das wrote: > RZ/G2N board is pin compatible with RZ/G2M board. However on the SoC > side RZ/G2N uses DU3 where as RZ/G2M uses DU2 for the DPAD. In order to > reuse the common dtsi for both the boards, it is required to move du clock > properties from common dtsi to board specific dts. > > Signed-off-by: Biju Das It would be nice if DT had a syntax that allowed extending an existing property. It would allow us to write &du { clocks += <&versaclock5 1>, <&x302_clk>, <&versaclock5 2>; clock-names += "dclkin.0", "dclkin.1", "dclkin.2"; }; in hihope-common.dtsi and be done with it. Rob, do you think that's something worth adding ? In any case, until we have that, this patch looks good to me. Reviewed-by: Laurent Pinchart > --- > arch/arm64/boot/dts/renesas/hihope-common.dtsi | 8 -------- > arch/arm64/boot/dts/renesas/r8a774a1-hihope-rzg2m.dts | 11 +++++++++++ > 2 files changed, 11 insertions(+), 8 deletions(-) > > diff --git a/arch/arm64/boot/dts/renesas/hihope-common.dtsi b/arch/arm64/boot/dts/renesas/hihope-common.dtsi > index 3e376d2..355d0a2 100644 > --- a/arch/arm64/boot/dts/renesas/hihope-common.dtsi > +++ b/arch/arm64/boot/dts/renesas/hihope-common.dtsi > @@ -142,14 +142,6 @@ > }; > > &du { > - clocks = <&cpg CPG_MOD 724>, > - <&cpg CPG_MOD 723>, > - <&cpg CPG_MOD 722>, > - <&versaclock5 1>, > - <&x302_clk>, > - <&versaclock5 2>; > - clock-names = "du.0", "du.1", "du.2", > - "dclkin.0", "dclkin.1", "dclkin.2"; > status = "okay"; > }; > > diff --git a/arch/arm64/boot/dts/renesas/r8a774a1-hihope-rzg2m.dts b/arch/arm64/boot/dts/renesas/r8a774a1-hihope-rzg2m.dts > index 93ca973..96f2fb0 100644 > --- a/arch/arm64/boot/dts/renesas/r8a774a1-hihope-rzg2m.dts > +++ b/arch/arm64/boot/dts/renesas/r8a774a1-hihope-rzg2m.dts > @@ -24,3 +24,14 @@ > reg = <0x6 0x00000000 0x0 0x80000000>; > }; > }; > + > +&du { > + clocks = <&cpg CPG_MOD 724>, > + <&cpg CPG_MOD 723>, > + <&cpg CPG_MOD 722>, > + <&versaclock5 1>, > + <&x302_clk>, > + <&versaclock5 2>; > + clock-names = "du.0", "du.1", "du.2", > + "dclkin.0", "dclkin.1", "dclkin.2"; > +}; -- Regards, Laurent Pinchart