From: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
To: "Niklas Söderlund" <niklas.soderlund+renesas@ragnatech.se>
Cc: Mauro Carvalho Chehab <mchehab@kernel.org>,
Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Conor Dooley <conor+dt@kernel.org>,
Geert Uytterhoeven <geert+renesas@glider.be>,
linux-media@vger.kernel.org, devicetree@vger.kernel.org,
linux-renesas-soc@vger.kernel.org
Subject: Re: [PATCH v5 6/6] arm64: dts: renesas: r8a779h0: Add family fallback for VIN IP
Date: Fri, 23 Aug 2024 16:42:45 +0300 [thread overview]
Message-ID: <20240823134245.GJ26098@pendragon.ideasonboard.com> (raw)
In-Reply-To: <20240704161620.1425409-7-niklas.soderlund+renesas@ragnatech.se>
Hi Niklas,
Thank you for the patch.
On Thu, Jul 04, 2024 at 06:16:20PM +0200, Niklas Söderlund wrote:
> The usage of the V4M VIN bindings where merged before the bindings where
s/where/were/g
> approved. At that time the family fallback compatible where not part of
> the bindings, add them.
>
> Fixes: 2bb78d9fb7c9 ("arm64: dts: renesas: r8a779h0: Add video capture nodes")
> Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
> ---
> * Changes since v3
> - New in v4.
> ---
> arch/arm64/boot/dts/renesas/r8a779h0.dtsi | 48 +++++++++++++++--------
> 1 file changed, 32 insertions(+), 16 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/renesas/r8a779h0.dtsi b/arch/arm64/boot/dts/renesas/r8a779h0.dtsi
> index 8f5763b5f267..b9f49288a115 100644
> --- a/arch/arm64/boot/dts/renesas/r8a779h0.dtsi
> +++ b/arch/arm64/boot/dts/renesas/r8a779h0.dtsi
> @@ -945,7 +945,8 @@ msiof5: spi@e6c28000 {
> };
>
> vin00: video@e6ef0000 {
> - compatible = "renesas,vin-r8a779h0";
> + compatible = "renesas,vin-r8a779h0",
> + "renesas,rcar-gen4-vin";
> reg = <0 0xe6ef0000 0 0x1000>;
> interrupts = <GIC_SPI 529 IRQ_TYPE_LEVEL_HIGH>;
> clocks = <&cpg CPG_MOD 730>;
> @@ -973,7 +974,8 @@ vin00isp0: endpoint@0 {
> };
>
> vin01: video@e6ef1000 {
> - compatible = "renesas,vin-r8a779h0";
> + compatible = "renesas,vin-r8a779h0",
> + "renesas,rcar-gen4-vin";
> reg = <0 0xe6ef1000 0 0x1000>;
> interrupts = <GIC_SPI 530 IRQ_TYPE_LEVEL_HIGH>;
> clocks = <&cpg CPG_MOD 731>;
> @@ -1001,7 +1003,8 @@ vin01isp0: endpoint@0 {
> };
>
> vin02: video@e6ef2000 {
> - compatible = "renesas,vin-r8a779h0";
> + compatible = "renesas,vin-r8a779h0",
> + "renesas,rcar-gen4-vin";
> reg = <0 0xe6ef2000 0 0x1000>;
> interrupts = <GIC_SPI 531 IRQ_TYPE_LEVEL_HIGH>;
> clocks = <&cpg CPG_MOD 800>;
> @@ -1029,7 +1032,8 @@ vin02isp0: endpoint@0 {
> };
>
> vin03: video@e6ef3000 {
> - compatible = "renesas,vin-r8a779h0";
> + compatible = "renesas,vin-r8a779h0",
> + "renesas,rcar-gen4-vin";
> reg = <0 0xe6ef3000 0 0x1000>;
> interrupts = <GIC_SPI 532 IRQ_TYPE_LEVEL_HIGH>;
> clocks = <&cpg CPG_MOD 801>;
> @@ -1057,7 +1061,8 @@ vin03isp0: endpoint@0 {
> };
>
> vin04: video@e6ef4000 {
> - compatible = "renesas,vin-r8a779h0";
> + compatible = "renesas,vin-r8a779h0",
> + "renesas,rcar-gen4-vin";
> reg = <0 0xe6ef4000 0 0x1000>;
> interrupts = <GIC_SPI 533 IRQ_TYPE_LEVEL_HIGH>;
> clocks = <&cpg CPG_MOD 802>;
> @@ -1085,7 +1090,8 @@ vin04isp0: endpoint@0 {
> };
>
> vin05: video@e6ef5000 {
> - compatible = "renesas,vin-r8a779h0";
> + compatible = "renesas,vin-r8a779h0",
> + "renesas,rcar-gen4-vin";
> reg = <0 0xe6ef5000 0 0x1000>;
> interrupts = <GIC_SPI 534 IRQ_TYPE_LEVEL_HIGH>;
> clocks = <&cpg CPG_MOD 803>;
> @@ -1113,7 +1119,8 @@ vin05isp0: endpoint@0 {
> };
>
> vin06: video@e6ef6000 {
> - compatible = "renesas,vin-r8a779h0";
> + compatible = "renesas,vin-r8a779h0",
> + "renesas,rcar-gen4-vin";
> reg = <0 0xe6ef6000 0 0x1000>;
> interrupts = <GIC_SPI 535 IRQ_TYPE_LEVEL_HIGH>;
> clocks = <&cpg CPG_MOD 804>;
> @@ -1141,7 +1148,8 @@ vin06isp0: endpoint@0 {
> };
>
> vin07: video@e6ef7000 {
> - compatible = "renesas,vin-r8a779h0";
> + compatible = "renesas,vin-r8a779h0",
> + "renesas,rcar-gen4-vin";
> reg = <0 0xe6ef7000 0 0x1000>;
> interrupts = <GIC_SPI 536 IRQ_TYPE_LEVEL_HIGH>;
> clocks = <&cpg CPG_MOD 805>;
> @@ -1169,7 +1177,8 @@ vin07isp0: endpoint@0 {
> };
>
> vin08: video@e6ef8000 {
> - compatible = "renesas,vin-r8a779h0";
> + compatible = "renesas,vin-r8a779h0",
> + "renesas,rcar-gen4-vin";
> reg = <0 0xe6ef8000 0 0x1000>;
> interrupts = <GIC_SPI 537 IRQ_TYPE_LEVEL_HIGH>;
> clocks = <&cpg CPG_MOD 806>;
> @@ -1197,7 +1206,8 @@ vin08isp1: endpoint@1 {
> };
>
> vin09: video@e6ef9000 {
> - compatible = "renesas,vin-r8a779h0";
> + compatible = "renesas,vin-r8a779h0",
> + "renesas,rcar-gen4-vin";
> reg = <0 0xe6ef9000 0 0x1000>;
> interrupts = <GIC_SPI 538 IRQ_TYPE_LEVEL_HIGH>;
> clocks = <&cpg CPG_MOD 807>;
> @@ -1225,7 +1235,8 @@ vin09isp1: endpoint@1 {
> };
>
> vin10: video@e6efa000 {
> - compatible = "renesas,vin-r8a779h0";
> + compatible = "renesas,vin-r8a779h0",
> + "renesas,rcar-gen4-vin";
> reg = <0 0xe6efa000 0 0x1000>;
> interrupts = <GIC_SPI 539 IRQ_TYPE_LEVEL_HIGH>;
> clocks = <&cpg CPG_MOD 808>;
> @@ -1253,7 +1264,8 @@ vin10isp1: endpoint@1 {
> };
>
> vin11: video@e6efb000 {
> - compatible = "renesas,vin-r8a779h0";
> + compatible = "renesas,vin-r8a779h0",
> + "renesas,rcar-gen4-vin";
> reg = <0 0xe6efb000 0 0x1000>;
> interrupts = <GIC_SPI 540 IRQ_TYPE_LEVEL_HIGH>;
> clocks = <&cpg CPG_MOD 809>;
> @@ -1281,7 +1293,8 @@ vin11isp1: endpoint@1 {
> };
>
> vin12: video@e6efc000 {
> - compatible = "renesas,vin-r8a779h0";
> + compatible = "renesas,vin-r8a779h0",
> + "renesas,rcar-gen4-vin";
> reg = <0 0xe6efc000 0 0x1000>;
> interrupts = <GIC_SPI 541 IRQ_TYPE_LEVEL_HIGH>;
> clocks = <&cpg CPG_MOD 810>;
> @@ -1309,7 +1322,8 @@ vin12isp1: endpoint@1 {
> };
>
> vin13: video@e6efd000 {
> - compatible = "renesas,vin-r8a779h0";
> + compatible = "renesas,vin-r8a779h0",
> + "renesas,rcar-gen4-vin";
> reg = <0 0xe6efd000 0 0x1000>;
> interrupts = <GIC_SPI 542 IRQ_TYPE_LEVEL_HIGH>;
> clocks = <&cpg CPG_MOD 811>;
> @@ -1337,7 +1351,8 @@ vin13isp1: endpoint@1 {
> };
>
> vin14: video@e6efe000 {
> - compatible = "renesas,vin-r8a779h0";
> + compatible = "renesas,vin-r8a779h0",
> + "renesas,rcar-gen4-vin";
> reg = <0 0xe6efe000 0 0x1000>;
> interrupts = <GIC_SPI 543 IRQ_TYPE_LEVEL_HIGH>;
> clocks = <&cpg CPG_MOD 812>;
> @@ -1365,7 +1380,8 @@ vin14isp1: endpoint@1 {
> };
>
> vin15: video@e6eff000 {
> - compatible = "renesas,vin-r8a779h0";
> + compatible = "renesas,vin-r8a779h0",
> + "renesas,rcar-gen4-vin";
> reg = <0 0xe6eff000 0 0x1000>;
> interrupts = <GIC_SPI 544 IRQ_TYPE_LEVEL_HIGH>;
> clocks = <&cpg CPG_MOD 813>;
--
Regards,
Laurent Pinchart
next prev parent reply other threads:[~2024-08-23 13:42 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-07-04 16:16 [PATCH v5 0/6] rcar-vin: Add support for R-Car V4M Niklas Söderlund
2024-07-04 16:16 ` [PATCH v5 1/6] dt-bindings: media: renesas,vin: Add Gen4 family fallback Niklas Söderlund
2024-08-23 13:37 ` Laurent Pinchart
2024-08-28 11:26 ` Krzysztof Kozlowski
2024-07-04 16:16 ` [PATCH v5 2/6] arm64: dts: renesas: r8a779g0: Add family fallback for VIN IP Niklas Söderlund
2024-08-23 13:39 ` Laurent Pinchart
2024-07-04 16:16 ` [PATCH v5 3/6] arm64: dts: renesas: r8a779a0: " Niklas Söderlund
2024-08-20 7:30 ` Geert Uytterhoeven
2024-08-23 13:40 ` Laurent Pinchart
2024-07-04 16:16 ` [PATCH v5 4/6] media: rcar-vin: Add family compatible for R-Car Gen4 family Niklas Söderlund
2024-08-23 13:40 ` Laurent Pinchart
2024-07-04 16:16 ` [PATCH v5 5/6] dt-bindings: media: renesas,vin: Add binding for V4M Niklas Söderlund
2024-08-23 13:41 ` Laurent Pinchart
2024-07-04 16:16 ` [PATCH v5 6/6] arm64: dts: renesas: r8a779h0: Add family fallback for VIN IP Niklas Söderlund
2024-08-23 13:42 ` Laurent Pinchart [this message]
2024-08-20 7:34 ` [PATCH v5 0/6] rcar-vin: Add support for R-Car V4M Geert Uytterhoeven
2024-08-21 11:51 ` Niklas Söderlund
2024-08-23 13:51 ` Laurent Pinchart
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