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* [PATCH 0/2] Add USB clock support for R9A09G077 and R9A09G087 SoCs
@ 2025-08-04 20:26 Prabhakar
  2025-08-04 20:26 ` [PATCH 1/2] dt-bindings: clock: renesas,r9a09g077/87: Add USB_CLK clock ID Prabhakar
  2025-08-04 20:26 ` [PATCH 2/2] clk: renesas: r9a09g077: Add USB core and module clocks Prabhakar
  0 siblings, 2 replies; 6+ messages in thread
From: Prabhakar @ 2025-08-04 20:26 UTC (permalink / raw)
  To: Geert Uytterhoeven, Michael Turquette, Stephen Boyd, Rob Herring,
	Krzysztof Kozlowski, Conor Dooley, Magnus Damm
  Cc: linux-renesas-soc, linux-clk, linux-kernel, devicetree, Prabhakar,
	Biju Das, Fabrizio Castro, Lad Prabhakar

From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>

Hi All,

This patch series adds support for the USB clock on the Renesas R9A09G077
and R9A09G087 SoCs. The first patch introduces the USB_CLK clock ID in the
device tree bindings, while the second patch implements the clock in the
clock driver.

Cheers,
Prabhakar

Lad Prabhakar (2):
  dt-bindings: clock: renesas,r9a09g077/87: Add USB_CLK clock ID
  clk: renesas: r9a09g077: Add USB core and module clocks

 drivers/clk/renesas/r9a09g077-cpg.c                    | 4 +++-
 include/dt-bindings/clock/renesas,r9a09g077-cpg-mssr.h | 1 +
 include/dt-bindings/clock/renesas,r9a09g087-cpg-mssr.h | 1 +
 3 files changed, 5 insertions(+), 1 deletion(-)

-- 
2.50.1


^ permalink raw reply	[flat|nested] 6+ messages in thread

* [PATCH 1/2] dt-bindings: clock: renesas,r9a09g077/87: Add USB_CLK clock ID
  2025-08-04 20:26 [PATCH 0/2] Add USB clock support for R9A09G077 and R9A09G087 SoCs Prabhakar
@ 2025-08-04 20:26 ` Prabhakar
  2025-08-05  7:05   ` Krzysztof Kozlowski
  2025-08-11 13:35   ` Geert Uytterhoeven
  2025-08-04 20:26 ` [PATCH 2/2] clk: renesas: r9a09g077: Add USB core and module clocks Prabhakar
  1 sibling, 2 replies; 6+ messages in thread
From: Prabhakar @ 2025-08-04 20:26 UTC (permalink / raw)
  To: Geert Uytterhoeven, Michael Turquette, Stephen Boyd, Rob Herring,
	Krzysztof Kozlowski, Conor Dooley, Magnus Damm
  Cc: linux-renesas-soc, linux-clk, linux-kernel, devicetree, Prabhakar,
	Biju Das, Fabrizio Castro, Lad Prabhakar

From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>

Add USB clock (USB_CLK) definition for the Renesas RZ/T2H (R9A09G077)
and RZ/N2H (R9A09G087) SoCs. USB_CLK is used as the reference clock for
USB PHY layer.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
---
 include/dt-bindings/clock/renesas,r9a09g077-cpg-mssr.h | 1 +
 include/dt-bindings/clock/renesas,r9a09g087-cpg-mssr.h | 1 +
 2 files changed, 2 insertions(+)

diff --git a/include/dt-bindings/clock/renesas,r9a09g077-cpg-mssr.h b/include/dt-bindings/clock/renesas,r9a09g077-cpg-mssr.h
index 7ecc4f0b235a..0c2ce81a8744 100644
--- a/include/dt-bindings/clock/renesas,r9a09g077-cpg-mssr.h
+++ b/include/dt-bindings/clock/renesas,r9a09g077-cpg-mssr.h
@@ -25,5 +25,6 @@
 #define R9A09G077_CLK_PCLKM		13
 #define R9A09G077_CLK_PCLKL		14
 #define R9A09G077_SDHI_CLKHS		15
+#define R9A09G077_USB_CLK		16
 
 #endif /* __DT_BINDINGS_CLOCK_RENESAS_R9A09G077_CPG_H__ */
diff --git a/include/dt-bindings/clock/renesas,r9a09g087-cpg-mssr.h b/include/dt-bindings/clock/renesas,r9a09g087-cpg-mssr.h
index 925e57703925..70ee883f2386 100644
--- a/include/dt-bindings/clock/renesas,r9a09g087-cpg-mssr.h
+++ b/include/dt-bindings/clock/renesas,r9a09g087-cpg-mssr.h
@@ -25,5 +25,6 @@
 #define R9A09G087_CLK_PCLKM		13
 #define R9A09G087_CLK_PCLKL		14
 #define R9A09G087_SDHI_CLKHS		15
+#define R9A09G087_USB_CLK		16
 
 #endif /* __DT_BINDINGS_CLOCK_RENESAS_R9A09G087_CPG_H__ */
-- 
2.50.1


^ permalink raw reply related	[flat|nested] 6+ messages in thread

* [PATCH 2/2] clk: renesas: r9a09g077: Add USB core and module clocks
  2025-08-04 20:26 [PATCH 0/2] Add USB clock support for R9A09G077 and R9A09G087 SoCs Prabhakar
  2025-08-04 20:26 ` [PATCH 1/2] dt-bindings: clock: renesas,r9a09g077/87: Add USB_CLK clock ID Prabhakar
@ 2025-08-04 20:26 ` Prabhakar
  2025-08-11 13:37   ` Geert Uytterhoeven
  1 sibling, 1 reply; 6+ messages in thread
From: Prabhakar @ 2025-08-04 20:26 UTC (permalink / raw)
  To: Geert Uytterhoeven, Michael Turquette, Stephen Boyd, Rob Herring,
	Krzysztof Kozlowski, Conor Dooley, Magnus Damm
  Cc: linux-renesas-soc, linux-clk, linux-kernel, devicetree, Prabhakar,
	Biju Das, Fabrizio Castro, Lad Prabhakar

From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>

Add module and core clocks used by USB.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
---
 drivers/clk/renesas/r9a09g077-cpg.c | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/drivers/clk/renesas/r9a09g077-cpg.c b/drivers/clk/renesas/r9a09g077-cpg.c
index c920d6a9707f..704d14d31e87 100644
--- a/drivers/clk/renesas/r9a09g077-cpg.c
+++ b/drivers/clk/renesas/r9a09g077-cpg.c
@@ -67,7 +67,7 @@ enum rzt2h_clk_types {
 
 enum clk_ids {
 	/* Core Clock Outputs exported to DT */
-	LAST_DT_CORE_CLK = R9A09G077_SDHI_CLKHS,
+	LAST_DT_CORE_CLK = R9A09G077_USB_CLK,
 
 	/* External Input Clocks */
 	CLK_EXTAL,
@@ -150,12 +150,14 @@ static const struct cpg_core_clk r9a09g077_core_clks[] __initconst = {
 	DEF_FIXED("PCLKL", R9A09G077_CLK_PCLKL, CLK_SEL_CLK_PLL1, 16, 1),
 	DEF_FIXED("PCLKAM", R9A09G077_CLK_PCLKAM, CLK_PLL4D1, 12, 1),
 	DEF_FIXED("SDHI_CLKHS", R9A09G077_SDHI_CLKHS, CLK_SEL_CLK_PLL2, 1, 1),
+	DEF_FIXED("USB_CLK", R9A09G077_USB_CLK, CLK_PLL4D1, 48, 1),
 };
 
 static const struct mssr_mod_clk r9a09g077_mod_clks[] __initconst = {
 	DEF_MOD("sci0fck", 8, CLK_SCI0ASYNC),
 	DEF_MOD("iic0", 100, R9A09G077_CLK_PCLKL),
 	DEF_MOD("iic1", 101, R9A09G077_CLK_PCLKL),
+	DEF_MOD("usb", 408, R9A09G077_CLK_PCLKAM),
 	DEF_MOD("iic2", 601, R9A09G077_CLK_PCLKL),
 	DEF_MOD("sdhi0", 1212, R9A09G077_CLK_PCLKAM),
 	DEF_MOD("sdhi1", 1213, R9A09G077_CLK_PCLKAM),
-- 
2.50.1


^ permalink raw reply related	[flat|nested] 6+ messages in thread

* Re: [PATCH 1/2] dt-bindings: clock: renesas,r9a09g077/87: Add USB_CLK clock ID
  2025-08-04 20:26 ` [PATCH 1/2] dt-bindings: clock: renesas,r9a09g077/87: Add USB_CLK clock ID Prabhakar
@ 2025-08-05  7:05   ` Krzysztof Kozlowski
  2025-08-11 13:35   ` Geert Uytterhoeven
  1 sibling, 0 replies; 6+ messages in thread
From: Krzysztof Kozlowski @ 2025-08-05  7:05 UTC (permalink / raw)
  To: Prabhakar
  Cc: Geert Uytterhoeven, Michael Turquette, Stephen Boyd, Rob Herring,
	Krzysztof Kozlowski, Conor Dooley, Magnus Damm, linux-renesas-soc,
	linux-clk, linux-kernel, devicetree, Biju Das, Fabrizio Castro,
	Lad Prabhakar

On Mon, Aug 04, 2025 at 09:26:42PM +0100, Prabhakar wrote:
> From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
> 
> Add USB clock (USB_CLK) definition for the Renesas RZ/T2H (R9A09G077)
> and RZ/N2H (R9A09G087) SoCs. USB_CLK is used as the reference clock for
> USB PHY layer.
> 
> Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
> ---
>  include/dt-bindings/clock/renesas,r9a09g077-cpg-mssr.h | 1 +
>  include/dt-bindings/clock/renesas,r9a09g087-cpg-mssr.h | 1 +
>  2 files changed, 2 insertions(+)

Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>

Best regards,
Krzysztof


^ permalink raw reply	[flat|nested] 6+ messages in thread

* Re: [PATCH 1/2] dt-bindings: clock: renesas,r9a09g077/87: Add USB_CLK clock ID
  2025-08-04 20:26 ` [PATCH 1/2] dt-bindings: clock: renesas,r9a09g077/87: Add USB_CLK clock ID Prabhakar
  2025-08-05  7:05   ` Krzysztof Kozlowski
@ 2025-08-11 13:35   ` Geert Uytterhoeven
  1 sibling, 0 replies; 6+ messages in thread
From: Geert Uytterhoeven @ 2025-08-11 13:35 UTC (permalink / raw)
  To: Prabhakar
  Cc: Michael Turquette, Stephen Boyd, Rob Herring, Krzysztof Kozlowski,
	Conor Dooley, Magnus Damm, linux-renesas-soc, linux-clk,
	linux-kernel, devicetree, Biju Das, Fabrizio Castro,
	Lad Prabhakar

On Mon, 4 Aug 2025 at 22:27, Prabhakar <prabhakar.csengg@gmail.com> wrote:
> From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
>
> Add USB clock (USB_CLK) definition for the Renesas RZ/T2H (R9A09G077)
> and RZ/N2H (R9A09G087) SoCs. USB_CLK is used as the reference clock for
> USB PHY layer.
>
> Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>

Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
i.e. will queue for v6.18 in a branch shared by clock and DT source code.

Gr{oetje,eeting}s,

                        Geert

-- 
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

^ permalink raw reply	[flat|nested] 6+ messages in thread

* Re: [PATCH 2/2] clk: renesas: r9a09g077: Add USB core and module clocks
  2025-08-04 20:26 ` [PATCH 2/2] clk: renesas: r9a09g077: Add USB core and module clocks Prabhakar
@ 2025-08-11 13:37   ` Geert Uytterhoeven
  0 siblings, 0 replies; 6+ messages in thread
From: Geert Uytterhoeven @ 2025-08-11 13:37 UTC (permalink / raw)
  To: Prabhakar
  Cc: Michael Turquette, Stephen Boyd, Rob Herring, Krzysztof Kozlowski,
	Conor Dooley, Magnus Damm, linux-renesas-soc, linux-clk,
	linux-kernel, devicetree, Biju Das, Fabrizio Castro,
	Lad Prabhakar

On Mon, 4 Aug 2025 at 22:27, Prabhakar <prabhakar.csengg@gmail.com> wrote:
> From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
>
> Add module and core clocks used by USB.
>
> Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>

Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
i.e. will queue in renesas-clk for v6.18.

Gr{oetje,eeting}s,

                        Geert

-- 
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

^ permalink raw reply	[flat|nested] 6+ messages in thread

end of thread, other threads:[~2025-08-11 13:37 UTC | newest]

Thread overview: 6+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2025-08-04 20:26 [PATCH 0/2] Add USB clock support for R9A09G077 and R9A09G087 SoCs Prabhakar
2025-08-04 20:26 ` [PATCH 1/2] dt-bindings: clock: renesas,r9a09g077/87: Add USB_CLK clock ID Prabhakar
2025-08-05  7:05   ` Krzysztof Kozlowski
2025-08-11 13:35   ` Geert Uytterhoeven
2025-08-04 20:26 ` [PATCH 2/2] clk: renesas: r9a09g077: Add USB core and module clocks Prabhakar
2025-08-11 13:37   ` Geert Uytterhoeven

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