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([183.91.15.56]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-82cf9b6113dsm5202251b3a.23.2026.04.03.04.27.38 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 03 Apr 2026 04:27:41 -0700 (PDT) From: phucduc.bui@gmail.com To: kuninori.morimoto.gx@renesas.com, broonie@kernel.org Cc: lgirdwood@gmail.com, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, geert+renesas@glider.be, magnus.damm@gmail.com, perex@perex.cz, tiwai@suse.com, linux-sound@vger.kernel.org, linux-renesas-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, bui duc phuc Subject: [PATCH 3/3] ASoC: renesas: fsi: Fix hang by enabling SPU clock Date: Fri, 3 Apr 2026 18:26:55 +0700 Message-ID: <20260403112655.167593-4-phucduc.bui@gmail.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260403112655.167593-1-phucduc.bui@gmail.com> References: <20260403112655.167593-1-phucduc.bui@gmail.com> Precedence: bulk X-Mailing-List: linux-renesas-soc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit From: bui duc phuc The FSI on r8a7740 requires the SPU clock to be enabled before accessing its registers. Without this clock, register access may lead to a system hang. Retrieve the "spu" clock in probe and enable it during DAI startup. Disable the clock on shutdown to match the audio stream lifecycle. This ensures safe register access and prevents system hangs during audio playback. This is required even if the FSI functional clock is enabled, as internal units depend on the SPU clock. Signed-off-by: bui duc phuc --- sound/soc/renesas/fsi.c | 14 ++++++++++++++ 1 file changed, 14 insertions(+) diff --git a/sound/soc/renesas/fsi.c b/sound/soc/renesas/fsi.c index 1491c2f2cc96..44bd1c1e6294 100644 --- a/sound/soc/renesas/fsi.c +++ b/sound/soc/renesas/fsi.c @@ -292,6 +292,7 @@ struct fsi_master { void __iomem *base; struct fsi_priv fsia; struct fsi_priv fsib; + struct clk *clk_spu; const struct fsi_core *core; spinlock_t lock; }; @@ -1554,6 +1555,11 @@ static int fsi_dai_startup(struct snd_pcm_substream *substream, struct snd_soc_dai *dai) { struct fsi_priv *fsi = fsi_get_priv(substream); + int ret; + + ret = clk_prepare_enable(fsi->master->clk_spu); + if (ret) + return ret; fsi_clk_invalid(fsi); @@ -1566,6 +1572,7 @@ static void fsi_dai_shutdown(struct snd_pcm_substream *substream, struct fsi_priv *fsi = fsi_get_priv(substream); fsi_clk_invalid(fsi); + clk_disable_unprepare(fsi->master->clk_spu); } static int fsi_dai_trigger(struct snd_pcm_substream *substream, int cmd, @@ -1963,6 +1970,13 @@ static int fsi_probe(struct platform_device *pdev) master->core = core; spin_lock_init(&master->lock); + /* SPU clock is required for FSI register access */ + master->clk_spu = devm_clk_get(&pdev->dev, "spu"); + if (IS_ERR(master->clk_spu)) { + dev_err(&pdev->dev, "Failed to get spu clock\n"); + return PTR_ERR(master->clk_spu); + } + /* FSI A setting */ fsi = &master->fsia; fsi->base = master->base; -- 2.43.0