From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-lf0-f52.google.com ([209.85.215.52]:35130 "EHLO mail-lf0-f52.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932813AbcI2W32 (ORCPT ); Thu, 29 Sep 2016 18:29:28 -0400 Received: by mail-lf0-f52.google.com with SMTP id l131so92362952lfl.2 for ; Thu, 29 Sep 2016 15:29:27 -0700 (PDT) From: Sergei Shtylyov To: horms@verge.net.au, linux-renesas-soc@vger.kernel.org, robh+dt@kernel.org, mark.rutland@arm.com, devicetree@vger.kernel.org Cc: magnus.damm@gmail.com, linux@arm.linux.org.uk, linux-arm-kernel@lists.infradead.org Subject: [PATCH RFC v2 8/12] ARM: dts: r8a7743: add Ether support Date: Fri, 30 Sep 2016 01:29:24 +0300 Message-ID: <2838747.DQZcGTqldA@wasted.cogentembedded.com> In-Reply-To: <1987532.PE2ex6PrJ5@wasted.cogentembedded.com> References: <1987532.PE2ex6PrJ5@wasted.cogentembedded.com> MIME-Version: 1.0 Content-Transfer-Encoding: 7Bit Content-Type: text/plain; charset="us-ascii" Sender: linux-renesas-soc-owner@vger.kernel.org List-ID: Define the generic R8A7743 part of the Ether device node. Based on the original (and large) patch by Dmitry Shifrin . Signed-off-by: Sergei Shtylyov --- Changes in version 2: - new patch. arch/arm/boot/dts/r8a7743.dtsi | 12 ++++++++++++ 1 file changed, 12 insertions(+) Index: renesas/arch/arm/boot/dts/r8a7743.dtsi =================================================================== --- renesas.orig/arch/arm/boot/dts/r8a7743.dtsi +++ renesas/arch/arm/boot/dts/r8a7743.dtsi @@ -415,6 +415,18 @@ status = "disabled"; }; + ether: ethernet@ee700000 { + compatible = "renesas,ether-r8a7743"; + reg = <0 0xee700000 0 0x400>; + interrupts = ; + clocks = <&mstp8_clks R8A7743_CLK_ETHER>; + power-domains = <&sysc R8A7743_PD_ALWAYS_ON>; + phy-mode = "rmii"; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + /* Special CPG clocks */ cpg_clocks: cpg_clocks@e6150000 { compatible = "renesas,r8a7743-cpg-clocks",