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[86.49.110.70]) by smtp.gmail.com with ESMTPSA id o8sm7261854wma.1.2019.03.07.01.37.04 (version=TLS1_3 cipher=AEAD-AES128-GCM-SHA256 bits=128/128); Thu, 07 Mar 2019 01:37:05 -0800 (PST) Subject: Re: [PATCH 1/2] [RFC] ata: ahci: Respect bus DMA constraints To: Robin Murphy , linux-ide@vger.kernel.org, linux-nvme@lists.infradead.org Cc: Marek Vasut , Christoph Hellwig , Geert Uytterhoeven , Jens Axboe , Jens Axboe , Keith Busch , Sagi Grimberg , Wolfram Sang , linux-renesas-soc@vger.kernel.org References: <20190307000440.8708-1-marek.vasut@gmail.com> <7c051bbd-7835-9cab-30b2-0acde1364781@arm.com> From: Marek Vasut Openpgp: preference=signencrypt Message-ID: <356f3ee8-407f-f865-e5cc-333695d4f857@gmail.com> Date: Thu, 7 Mar 2019 10:37:04 +0100 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:60.0) Gecko/20100101 Thunderbird/60.4.0 MIME-Version: 1.0 In-Reply-To: <7c051bbd-7835-9cab-30b2-0acde1364781@arm.com> Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 8bit Sender: linux-renesas-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-renesas-soc@vger.kernel.org On 3/7/19 10:32 AM, Robin Murphy wrote: > On 2019-03-07 12:04 am, marek.vasut@gmail.com wrote: >> From: Marek Vasut >> >> Since commit 6c2fb2ea7636 ("of/device: Set bus DMA mask as appropriate"), >> the upstream bus can constraint device DMA range. Respect that constraint >> and do not change the device DMA masks if they were already set. >> >> This is applicable e.g. on systems where the PCIe controller cannot >> expose >> the full address space range. Such a system may have a 64bit CPU with >> DRAM >> mapped both below and above the 32bit address space, yet the PCIe devices >> can not perform DMA directly to/from the DRAM range above the 32bit >> limit. >> Hence, for such setup to work, all the buffers must exist below the 32bit >> limit. >> >> Signed-off-by: Marek Vasut >> Cc: Christoph Hellwig >> Cc: Geert Uytterhoeven >> Cc: Jens Axboe >> Cc: Jens Axboe >> Cc: Keith Busch >> Cc: Robin Murphy >> Cc: Sagi Grimberg >> Cc: Wolfram Sang >> Cc: linux-renesas-soc@vger.kernel.org >> To: linux-ide@vger.kernel.org >> To: linux-nvme@lists.infradead.org >> --- >>   drivers/ata/ahci.c | 7 +++++++ >>   1 file changed, 7 insertions(+) >> >> diff --git a/drivers/ata/ahci.c b/drivers/ata/ahci.c >> index 021ce46e2e57..2acce056dd8c 100644 >> --- a/drivers/ata/ahci.c >> +++ b/drivers/ata/ahci.c >> @@ -926,6 +926,13 @@ static int ahci_configure_dma_masks(struct >> pci_dev *pdev, int using_dac) >>       if (pdev->dma_mask && pdev->dma_mask < DMA_BIT_MASK(32)) >>           return 0; >>   +    /* >> +     * The upstream device could have applied DMA constraints already, >> +     * respect those and do not change the DMA masks. >> +     */ >> +    if (pdev->dev.dma_mask && pdev->dev.coherent_dma_mask) >> +        return 0; > > At least for DT platforms, the device masks are always going to be set > to some initial value, which will most commonly just be the 32-bit > default - that should not prevent the driver from setting wider masks if > that's what the device really supports (in fact there are some patches > queued in which we're now starting to formalise that properly). > > Are you seeing a problem with a DMA API backend failing to respect > bus_dma_mask? Yes, the DMA mask gets overridden here to 64bit one, which on the R-Car Gen3 with PCI with 32bit addressing limitation makes the AHCI driver fail (and NVMe driver, and xHCI PCI etc). All those PCI devices fail the same way because they override the DMA mask. -- Best regards, Marek Vasut