From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: From: Sergei Shtylyov To: horms@verge.net.au, linux-renesas-soc@vger.kernel.org, robh+dt@kernel.org, mark.rutland@arm.com, devicetree@vger.kernel.org Cc: magnus.damm@gmail.com, linux@arm.linux.org.uk, linux-arm-kernel@lists.infradead.org Subject: [PATCH 1/3] ARM: dts: r8a7792: add QSPI clock Date: Sat, 03 Sep 2016 01:07:28 +0300 Message-ID: <4143164.BtXsTN0b8O@wasted.cogentembedded.com> In-Reply-To: <1648590.FPpmBRoQyh@wasted.cogentembedded.com> References: <1648590.FPpmBRoQyh@wasted.cogentembedded.com> MIME-Version: 1.0 Content-Transfer-Encoding: 7Bit Content-Type: text/plain; charset="us-ascii" Sender: devicetree-owner@vger.kernel.org List-ID: Describe the QSPI clock in the R8A7792 device tree. Based on the original (and large) patch by Vladimir Barinov . Signed-off-by: Sergei Shtylyov --- arch/arm/boot/dts/r8a7792.dtsi | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) Index: renesas/arch/arm/boot/dts/r8a7792.dtsi =================================================================== --- renesas.orig/arch/arm/boot/dts/r8a7792.dtsi +++ renesas/arch/arm/boot/dts/r8a7792.dtsi @@ -860,6 +860,7 @@ clocks = <&cp_clk>, <&cp_clk>, <&cp_clk>, <&cp_clk>, <&cp_clk>, <&cp_clk>, <&cp_clk>, <&cp_clk>, <&cp_clk>, <&cp_clk>, <&p_clk>, <&p_clk>, + <&cpg_clocks R8A7792_CLK_QSPI>, <&cp_clk>, <&cp_clk>, <&hp_clk>, <&hp_clk>, <&hp_clk>, <&hp_clk>, <&hp_clk>, <&hp_clk>; #clock-cells = <1>; @@ -870,6 +871,7 @@ R8A7792_CLK_GPIO1 R8A7792_CLK_GPIO0 R8A7792_CLK_GPIO11 R8A7792_CLK_GPIO10 R8A7792_CLK_CAN1 R8A7792_CLK_CAN0 + R8A7792_CLK_QSPI_MOD R8A7792_CLK_GPIO9 R8A7792_CLK_GPIO8 R8A7792_CLK_I2C5 R8A7792_CLK_I2C4 R8A7792_CLK_I2C3 R8A7792_CLK_I2C2 @@ -879,8 +881,9 @@ "gpio7", "gpio6", "gpio5", "gpio4", "gpio3", "gpio2", "gpio1", "gpio0", "gpio11", "gpio10", "can1", "can0", - "gpio9", "gpio8", "i2c5", "i2c4", - "i2c3", "i2c2", "i2c1", "i2c0"; + "qspi_mod", "gpio9", "gpio8", + "i2c5", "i2c4", "i2c3", "i2c2", + "i2c1", "i2c0"; }; };