Linux Renesas SOC kernel development
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From: Khiem Nguyen <khiem.nguyen.xt@rvc.renesas.com>
To: geert+renesas@glider.be
Cc: "linux-renesas-soc@vger.kernel.org"
	<linux-renesas-soc@vger.kernel.org>,
	"Khiem Trong. Nguyen" <khiem.nguyen.xt@rvc.renesas.com>,
	Toru Oishi <toru.oishi.zj@rvc.renesas.com>,
	Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>,
	Wolfram Sang <wsa@the-dreams.de>
Subject: [PATCH] clk: renesas: r8a7795: Add THS/TSC clock
Date: Sun, 19 Jun 2016 09:34:18 +0700	[thread overview]
Message-ID: <576604AA.8020508@rvc.renesas.com> (raw)


Signed-off-by: Khiem Nguyen <khiem.nguyen.xt@rvc.renesas.com>
---
 drivers/clk/renesas/r8a7795-cpg-mssr.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/clk/renesas/r8a7795-cpg-mssr.c b/drivers/clk/renesas/r8a7795-cpg-mssr.c
index ad01b0b..371a795 100644
--- a/drivers/clk/renesas/r8a7795-cpg-mssr.c
+++ b/drivers/clk/renesas/r8a7795-cpg-mssr.c
@@ -143,6 +143,7 @@ static const struct mssr_mod_clk r8a7795_mod_clks[] __initconst = {
 	DEF_MOD("hscif2",		 518,	R8A7795_CLK_S3D1),
 	DEF_MOD("hscif1",		 519,	R8A7795_CLK_S3D1),
 	DEF_MOD("hscif0",		 520,	R8A7795_CLK_S3D1),
+	DEF_MOD("thermal",		 522,	R8A7795_CLK_CP),
 	DEF_MOD("pwm",			 523,	R8A7795_CLK_S3D4),
 	DEF_MOD("fcpvd3",		 600,	R8A7795_CLK_S2D1),
 	DEF_MOD("fcpvd2",		 601,	R8A7795_CLK_S2D1),
-- 
1.9.1

             reply	other threads:[~2016-06-19  2:34 UTC|newest]

Thread overview: 2+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-06-19  2:34 Khiem Nguyen [this message]
2016-06-20  7:33 ` [PATCH] clk: renesas: r8a7795: Add THS/TSC clock Geert Uytterhoeven

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