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From: Marek Vasut <marek.vasut@mailbox.org>
To: Tomi Valkeinen <tomi.valkeinen+renesas@ideasonboard.com>,
	Marek Vasut <marek.vasut+renesas@mailbox.org>,
	dri-devel@lists.freedesktop.org
Cc: David Airlie <airlied@gmail.com>,
	Geert Uytterhoeven <geert+renesas@glider.be>,
	Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>,
	Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>,
	Maarten Lankhorst <maarten.lankhorst@linux.intel.com>,
	Magnus Damm <magnus.damm@gmail.com>,
	Maxime Ripard <mripard@kernel.org>,
	Simona Vetter <simona@ffwll.ch>,
	Thomas Zimmermann <tzimmermann@suse.de>,
	linux-renesas-soc@vger.kernel.org
Subject: Re: [PATCH 1/4] drm/rcar-du: dsi: Convert register bits to BIT() macro
Date: Tue, 12 Aug 2025 21:32:36 +0200	[thread overview]
Message-ID: <7dc2c17d-9879-41c8-b90d-19f92a2d9c1e@mailbox.org> (raw)
In-Reply-To: <bc31d938-847d-46a5-af1e-29de3ac21504@ideasonboard.com>

On 8/12/25 3:26 PM, Tomi Valkeinen wrote:

Hi,

>> diff --git a/drivers/gpu/drm/renesas/rcar-du/rcar_mipi_dsi_regs.h b/drivers/gpu/drm/renesas/rcar-du/rcar_mipi_dsi_regs.h
>> index a6b276f1d6ee..b3e57217ae63 100644
>> --- a/drivers/gpu/drm/renesas/rcar-du/rcar_mipi_dsi_regs.h
>> +++ b/drivers/gpu/drm/renesas/rcar-du/rcar_mipi_dsi_regs.h

[...]

>> @@ -51,11 +51,11 @@
>>   
>>   #define TXVMVPRMSET0R			0x1d0
>>   #define TXVMVPRMSET0R_HSPOL_HIG		(0 << 17)
>> -#define TXVMVPRMSET0R_HSPOL_LOW		(1 << 17)
>> +#define TXVMVPRMSET0R_HSPOL_LOW		BIT(17)
> 
> I'm not sure about this (and below). We have two defines for the HSPOL,
> high and low. If one of them is (x << y), shouldn't the other one be of
> that style too?
It is inconsistent, but one macro describes bit set to 0 and the other 
bit set to 1 (i.e. the actual bit) which is converted to BIT(n) macro. I 
would be tempted to remove the bits set to 0, that's probably the real 
discussion that should happen here. But that would also be a much bigger 
patch. What do you think ?

  reply	other threads:[~2025-08-12 19:32 UTC|newest]

Thread overview: 24+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-06-08 14:24 [PATCH 0/4] drm/rcar-du: dsi: Implement DSI command support Marek Vasut
2025-06-08 14:24 ` [PATCH 1/4] drm/rcar-du: dsi: Convert register bits to BIT() macro Marek Vasut
2025-08-12 13:26   ` Tomi Valkeinen
2025-08-12 19:32     ` Marek Vasut [this message]
2025-08-12 20:05       ` Laurent Pinchart
2025-08-13  6:59         ` Geert Uytterhoeven
2025-08-13 20:47           ` Marek Vasut
2025-08-13  7:42       ` Tomi Valkeinen
2025-08-13 20:51         ` Marek Vasut
2025-06-08 14:24 ` [PATCH 2/4] drm/rcar-du: dsi: Remove fixed PPI lane count setup Marek Vasut
2025-08-12 13:18   ` Tomi Valkeinen
2025-08-12 13:30     ` Tomi Valkeinen
2025-08-12 19:35       ` Marek Vasut
2025-08-13  7:34         ` Tomi Valkeinen
2025-08-13 21:06           ` Marek Vasut
2025-08-14  5:39             ` Tomi Valkeinen
2025-08-17 22:46               ` Marek Vasut
2025-06-08 14:24 ` [PATCH 3/4] drm/rcar-du: dsi: Configure TXSETR register to match PPI lane count Marek Vasut
2025-06-08 14:24 ` [PATCH 4/4] drm/rcar-du: dsi: Implement DSI command support Marek Vasut
2025-06-09  0:51   ` kernel test robot
2025-08-12 14:36   ` Tomi Valkeinen
2025-08-17 23:40     ` Marek Vasut
2025-08-18  7:20       ` Tomi Valkeinen
2025-08-31 18:57         ` Marek Vasut

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