From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
To: Geert Uytterhoeven <geert+renesas@glider.be>
Cc: Linus Walleij <linus.walleij@linaro.org>,
linux-renesas-soc@vger.kernel.org, linux-gpio@vger.kernel.org
Subject: [PATCH v3 11/21] pinctrl: renesas: r8a779g0: add missing HSCIF3_A
Date: Tue, 14 Jun 2022 05:59:46 +0000 [thread overview]
Message-ID: <87o7yvkcoe.wl-kuninori.morimoto.gx@renesas.com> (raw)
In-Reply-To: <874k0nlrbw.wl-kuninori.morimoto.gx@renesas.com>
From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
This patch adds missing HSCIF3_A
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
---
drivers/pinctrl/renesas/pfc-r8a779g0.c | 53 +++++++++++++++++++++++---
1 file changed, 48 insertions(+), 5 deletions(-)
diff --git a/drivers/pinctrl/renesas/pfc-r8a779g0.c b/drivers/pinctrl/renesas/pfc-r8a779g0.c
index 4e4ccbc32dac..d84fa59a0bcc 100644
--- a/drivers/pinctrl/renesas/pfc-r8a779g0.c
+++ b/drivers/pinctrl/renesas/pfc-r8a779g0.c
@@ -289,11 +289,11 @@
/* SR1 */
/* IP0SR1 */ /* 0 */ /* 1 */ /* 2 */ /* 3 4 5 6 7 8 9 A B C D E F */
-#define IP0SR1_3_0 FM(MSIOF1_SS2) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-#define IP0SR1_7_4 FM(MSIOF1_SS1) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-#define IP0SR1_11_8 FM(MSIOF1_SYNC) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-#define IP0SR1_15_12 FM(MSIOF1_SCK) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-#define IP0SR1_19_16 FM(MSIOF1_TXD) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
+#define IP0SR1_3_0 FM(MSIOF1_SS2) FM(HTX3_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
+#define IP0SR1_7_4 FM(MSIOF1_SS1) FM(HCTS3_A_N) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
+#define IP0SR1_11_8 FM(MSIOF1_SYNC) FM(HRTS3_A_N) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
+#define IP0SR1_15_12 FM(MSIOF1_SCK) FM(HSCK3_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
+#define IP0SR1_19_16 FM(MSIOF1_TXD) FM(HRX3_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
#define IP0SR1_23_20 FM(MSIOF1_RXD) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
#define IP0SR1_27_24 FM(MSIOF0_SS2) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
#define IP0SR1_31_28 FM(MSIOF0_SS1) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
@@ -824,10 +824,20 @@ static const u16 pinmux_data[] = {
/* IP0SR1 */
PINMUX_IPSR_GPSR(IP0SR1_3_0, MSIOF1_SS2),
+ PINMUX_IPSR_GPSR(IP0SR1_3_0, HTX3_A),
+
PINMUX_IPSR_GPSR(IP0SR1_7_4, MSIOF1_SS1),
+ PINMUX_IPSR_GPSR(IP0SR1_7_4, HCTS3_A_N),
+
PINMUX_IPSR_GPSR(IP0SR1_11_8, MSIOF1_SYNC),
+ PINMUX_IPSR_GPSR(IP0SR1_11_8, HRTS3_A_N),
+
PINMUX_IPSR_GPSR(IP0SR1_15_12, MSIOF1_SCK),
+ PINMUX_IPSR_GPSR(IP0SR1_15_12, HSCK3_A),
+
PINMUX_IPSR_GPSR(IP0SR1_19_16, MSIOF1_TXD),
+ PINMUX_IPSR_GPSR(IP0SR1_19_16, HRX3_A),
+
PINMUX_IPSR_GPSR(IP0SR1_23_20, MSIOF1_RXD),
PINMUX_IPSR_GPSR(IP0SR1_27_24, MSIOF0_SS2),
PINMUX_IPSR_GPSR(IP0SR1_31_28, MSIOF0_SS1),
@@ -1590,6 +1600,29 @@ static const unsigned int hscif3_ctrl_mux[] = {
HRTS3_N_MARK, HCTS3_N_MARK,
};
+/* - HSCIF3_A ----------------------------------------------------------------- */
+static const unsigned int hscif3_a_data_pins[] = {
+ /* HRX3, HTX3 */
+ RCAR_GP_PIN(1, 4), RCAR_GP_PIN(1, 0),
+};
+static const unsigned int hscif3_a_data_mux[] = {
+ HRX3_A_MARK, HTX3_A_MARK,
+};
+static const unsigned int hscif3_a_clk_pins[] = {
+ /* HSCK3 */
+ RCAR_GP_PIN(1, 3),
+};
+static const unsigned int hscif3_a_clk_mux[] = {
+ HSCK3_A_MARK,
+};
+static const unsigned int hscif3_a_ctrl_pins[] = {
+ /* HRTS3#, HCTS3# */
+ RCAR_GP_PIN(1, 2), RCAR_GP_PIN(1, 1),
+};
+static const unsigned int hscif3_a_ctrl_mux[] = {
+ HRTS3_A_N_MARK, HCTS3_A_N_MARK,
+};
+
/* - I2C0 ------------------------------------------------------------------- */
static const unsigned int i2c0_pins[] = {
/* SDA0, SCL0 */
@@ -2351,6 +2384,9 @@ static const struct sh_pfc_pin_group pinmux_groups[] = {
SH_PFC_PIN_GROUP(hscif3_data),
SH_PFC_PIN_GROUP(hscif3_clk),
SH_PFC_PIN_GROUP(hscif3_ctrl),
+ SH_PFC_PIN_GROUP(hscif3_a_data),
+ SH_PFC_PIN_GROUP(hscif3_a_clk),
+ SH_PFC_PIN_GROUP(hscif3_a_ctrl),
SH_PFC_PIN_GROUP(i2c0),
SH_PFC_PIN_GROUP(i2c1),
@@ -2555,6 +2591,12 @@ static const char * const hscif3_groups[] = {
"hscif3_ctrl",
};
+static const char * const hscif3_a_groups[] = {
+ "hscif3_a_data",
+ "hscif3_a_clk",
+ "hscif3_a_ctrl",
+};
+
static const char * const i2c0_groups[] = {
"i2c0",
};
@@ -2765,6 +2807,7 @@ static const struct sh_pfc_function pinmux_functions[] = {
SH_PFC_FUNCTION(hscif1),
SH_PFC_FUNCTION(hscif2),
SH_PFC_FUNCTION(hscif3),
+ SH_PFC_FUNCTION(hscif3_a),
SH_PFC_FUNCTION(i2c0),
SH_PFC_FUNCTION(i2c1),
--
2.25.1
next prev parent reply other threads:[~2022-06-14 5:59 UTC|newest]
Thread overview: 53+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-06-14 5:57 [PATCH v3 00/21] pinctrl: renesas: r8a779g0: Add pins, groups and functions Kuninori Morimoto
2022-06-14 5:58 ` [PATCH v3 01/21] dt-bindings: pinctrl: renesas,pfc: Document r8a779g0 support Kuninori Morimoto
2022-06-17 12:30 ` Geert Uytterhoeven
2022-06-14 5:58 ` [PATCH v3 02/21] pinctrl: renesas: Add PORT_GP_CFG_13 macros Kuninori Morimoto
2022-06-17 12:30 ` Geert Uytterhoeven
2022-06-14 5:58 ` [PATCH v3 04/21] pinctrl: renesas: r8a779g0: Add pins, groups and functions Kuninori Morimoto
2022-06-17 15:15 ` Geert Uytterhoeven
2022-06-14 5:59 ` [PATCH v3 05/21] pinctrl: renesas: r8a779g0: remove not used NOGP definitions Kuninori Morimoto
2022-06-17 15:16 ` Geert Uytterhoeven
2022-06-14 5:59 ` [PATCH v3 06/21] pinctrl: renesas: r8a779g0: remove not used IPxSRx definitions Kuninori Morimoto
2022-06-17 15:17 ` Geert Uytterhoeven
2022-06-14 5:59 ` [PATCH v3 07/21] pinctrl: renesas: r8a779g0: remove not used MOD_SELx definitions Kuninori Morimoto
2022-06-17 15:17 ` Geert Uytterhoeven
2022-06-21 0:12 ` Kuninori Morimoto
2022-06-21 6:36 ` Geert Uytterhoeven
2022-06-14 5:59 ` [PATCH v3 08/21] pinctrl: renesas: r8a779g0: tidyup ioctrl_regs Kuninori Morimoto
2022-06-17 15:17 ` Geert Uytterhoeven
2022-06-14 5:59 ` [PATCH v3 09/21] pinctrl: renesas: r8a779g0: add missing TCLKx_A/TCLK_B/TCLKx_X Kuninori Morimoto
2022-06-17 15:17 ` Geert Uytterhoeven
2022-06-29 1:26 ` Kuninori Morimoto
2022-06-29 2:49 ` Kuninori Morimoto
2022-06-29 7:16 ` Geert Uytterhoeven
2022-06-29 23:37 ` Kuninori Morimoto
2022-06-30 9:30 ` Geert Uytterhoeven
2022-06-30 23:35 ` Kuninori Morimoto
2022-06-14 5:59 ` [PATCH v3 10/21] pinctrl: renesas: r8a779g0: add missing IRQx_A/IRQx_B Kuninori Morimoto
2022-06-17 15:18 ` Geert Uytterhoeven
2022-06-14 5:59 ` Kuninori Morimoto [this message]
2022-06-17 15:18 ` [PATCH v3 11/21] pinctrl: renesas: r8a779g0: add missing HSCIF3_A Geert Uytterhoeven
2022-06-14 5:59 ` [PATCH v3 12/21] pinctrl: renesas: r8a779g0: add missing HSCIF1_X Kuninori Morimoto
2022-06-17 15:18 ` Geert Uytterhoeven
2022-06-14 6:00 ` [PATCH v3 13/21] pinctrl: renesas: r8a779g0: add missing SCIF3 Kuninori Morimoto
2022-06-17 15:18 ` Geert Uytterhoeven
2022-06-14 6:00 ` [PATCH v3 14/21] pinctrl: renesas: r8a779g0: add missing SCIF1_X Kuninori Morimoto
2022-06-17 15:18 ` Geert Uytterhoeven
2022-06-14 6:00 ` [PATCH v3 15/21] pinctrl: renesas: r8a779g0: add missing CANFD5_B Kuninori Morimoto
2022-06-17 15:18 ` Geert Uytterhoeven
2022-06-14 6:00 ` [PATCH v3 16/21] pinctrl: renesas: r8a779g0: add missing TPU0TOx_A Kuninori Morimoto
2022-06-17 15:18 ` Geert Uytterhoeven
2022-06-14 6:00 ` [PATCH v3 17/21] pinctrl: renesas: r8a779g0: add missing FlaxRay Kuninori Morimoto
2022-06-17 15:18 ` Geert Uytterhoeven
2022-06-14 6:00 ` [PATCH v3 18/21] pinctrl: renesas: r8a779g0: add missing PWM Kuninori Morimoto
2022-06-17 15:19 ` Geert Uytterhoeven
2022-06-14 6:00 ` [PATCH v3 19/21] pinctrl: renesas: r8a779g0: add missing ERROROUTC_A Kuninori Morimoto
2022-06-17 15:19 ` Geert Uytterhoeven
2022-06-14 6:00 ` [PATCH v3 20/21] pinctrl: renesas: r8a779g0: add missing MODSELx for TSN0 Kuninori Morimoto
2022-06-17 15:19 ` Geert Uytterhoeven
2022-06-14 6:01 ` [PATCH v3 21/21] pinctrl: renesas: r8a779g0: add missing MODSELx for AVBx Kuninori Morimoto
2022-06-17 15:19 ` Geert Uytterhoeven
[not found] ` <87zgifkcqa.wl-kuninori.morimoto.gx@renesas.com>
2022-06-17 15:13 ` [PATCH v3 03/21] pinctrl: renesas: Initial R8A779G0 (V4H) PFC support Geert Uytterhoeven
2022-06-20 0:18 ` Kuninori Morimoto
2022-06-20 6:21 ` Geert Uytterhoeven
2022-06-20 6:58 ` Kuninori Morimoto
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=87o7yvkcoe.wl-kuninori.morimoto.gx@renesas.com \
--to=kuninori.morimoto.gx@renesas.com \
--cc=geert+renesas@glider.be \
--cc=linus.walleij@linaro.org \
--cc=linux-gpio@vger.kernel.org \
--cc=linux-renesas-soc@vger.kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox