From: Geert Uytterhoeven <geert@linux-m68k.org>
To: "Niklas Söderlund" <niklas.soderlund+renesas@ragnatech.se>
Cc: Geert Uytterhoeven <geert+renesas@glider.be>,
Linux-Renesas <linux-renesas-soc@vger.kernel.org>,
"linux-gpio@vger.kernel.org" <linux-gpio@vger.kernel.org>,
Laurent Pinchart <laurent.pinchart@ideasonboard.com>,
Linus Walleij <linus.walleij@linaro.org>
Subject: Re: [PATCH 0/4] pinctrl: sh-pfc: r8a7795: Support none GPIO pins with configurable drive-strength
Date: Tue, 4 Oct 2016 21:09:08 +0200 [thread overview]
Message-ID: <CAMuHMdV0PMg3VOorxgzm6jCs5VECEuL7XHWAemaVS3c0hH0BkQ@mail.gmail.com> (raw)
In-Reply-To: <20160913140314.22035-1-niklas.soderlund+renesas@ragnatech.se>
Hi Niklas,
On Tue, Sep 13, 2016 at 4:03 PM, Niklas Söderlund
<niklas.soderlund+renesas@ragnatech.se> wrote:
> I did not add FSCLKST since I can't figure out which physical pin it's
> mapped to. Looking at the code that is already there and documentation
> it should be a GPIO pin controlled by IPSR7[15:12] but the documentation
> and code is lacking that part and I can't with a 100% certainty figure
> out which physical pin it is.
FSCLKST is pin AD38, according to R-CarH3SiP_pin_arrangement rev1.01.
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
prev parent reply other threads:[~2016-10-04 19:09 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-09-13 14:03 [PATCH 0/4] pinctrl: sh-pfc: r8a7795: Support none GPIO pins with configurable drive-strength Niklas Söderlund
2016-09-13 14:03 ` [PATCH 1/4] pinctrl: sh-pfc: Support named pins with custom configuration Niklas Söderlund
2016-09-13 14:28 ` Laurent Pinchart
2016-10-04 19:08 ` Geert Uytterhoeven
2016-09-13 14:03 ` [PATCH 2/4] pinctrl: sh-pfc: r8a7795: Support none GPIO pins with configurable drive-strength Niklas Söderlund
2016-10-04 19:13 ` Geert Uytterhoeven
2016-10-05 8:33 ` Niklas Söderlund
2016-10-05 9:51 ` Geert Uytterhoeven
2016-10-05 10:12 ` Laurent Pinchart
2016-10-06 9:27 ` Niklas Söderlund
2016-09-13 14:03 ` [PATCH 3/4] pinctrl: sh-pfc: r8a7795: Add group for AVB MDIO and MII pins Niklas Söderlund
2016-09-14 9:05 ` Sergei Shtylyov
2016-10-05 7:41 ` Geert Uytterhoeven
2016-09-13 14:03 ` [PATCH 4/4] pinctrl: sh-pfc: r8a7795: Add group for QSPI0 and QSPI1 pins Niklas Söderlund
2016-10-05 7:33 ` Geert Uytterhoeven
2016-10-04 19:09 ` Geert Uytterhoeven [this message]
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