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* [PATCH 0/2] clk: renesas: r8a779a0: Add clocks to support thermal
@ 2020-11-26 22:14 Niklas Söderlund
  2020-11-26 22:14 ` [PATCH 1/2] clk: renesas: r8a779a0: Add CP clock Niklas Söderlund
  2020-11-26 22:14 ` [PATCH 2/2] clk: renesas: r8a779a0: Add THS/TSC clock Niklas Söderlund
  0 siblings, 2 replies; 5+ messages in thread
From: Niklas Söderlund @ 2020-11-26 22:14 UTC (permalink / raw)
  To: Geert Uytterhoeven, linux-clk; +Cc: linux-renesas-soc, Niklas Söderlund

Hello,

This series aims to add enough clocks to enable proper operation of the 
thermal IP block for V3U. The series have been tested on target together 
with other thermal enablement patches to prove operation of thermal.

Niklas Söderlund (2):
  clk: renesas: r8a779a0: Add CP clock
  clk: renesas: r8a779a0: Add THS/TSC clock

 drivers/clk/renesas/r8a779a0-cpg-mssr.c | 3 +++
 1 file changed, 3 insertions(+)

-- 
2.29.2


^ permalink raw reply	[flat|nested] 5+ messages in thread

* [PATCH 1/2] clk: renesas: r8a779a0: Add CP clock
  2020-11-26 22:14 [PATCH 0/2] clk: renesas: r8a779a0: Add clocks to support thermal Niklas Söderlund
@ 2020-11-26 22:14 ` Niklas Söderlund
  2020-11-27  9:02   ` Geert Uytterhoeven
  2020-11-26 22:14 ` [PATCH 2/2] clk: renesas: r8a779a0: Add THS/TSC clock Niklas Söderlund
  1 sibling, 1 reply; 5+ messages in thread
From: Niklas Söderlund @ 2020-11-26 22:14 UTC (permalink / raw)
  To: Geert Uytterhoeven, linux-clk; +Cc: linux-renesas-soc, Niklas Söderlund

Implement support for the CP clock on V3U.

Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
---
 drivers/clk/renesas/r8a779a0-cpg-mssr.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/drivers/clk/renesas/r8a779a0-cpg-mssr.c b/drivers/clk/renesas/r8a779a0-cpg-mssr.c
index aa5389b04d74204b..7bf7a98cdb7bb5be 100644
--- a/drivers/clk/renesas/r8a779a0-cpg-mssr.c
+++ b/drivers/clk/renesas/r8a779a0-cpg-mssr.c
@@ -139,6 +139,8 @@ static const struct cpg_core_clk r8a779a0_core_clks[] __initconst = {
 	DEF_FIXED("vcbus",	R8A779A0_CLK_VCBUS,	CLK_PLL5_DIV4,	1, 1),
 	DEF_FIXED("cbfusa",	R8A779A0_CLK_CBFUSA,	CLK_MAIN,	2, 1),
 
+	DEF_FIXED("cp",		R8A779A0_CLK_CP,	CLK_EXTAL,	2, 1),
+
 	DEF_DIV6P1("mso",	R8A779A0_CLK_MSO,	CLK_PLL5_DIV4,	0x87c),
 	DEF_DIV6P1("canfd",	R8A779A0_CLK_CANFD,	CLK_PLL5_DIV4,	0x878),
 	DEF_DIV6P1("csi0",	R8A779A0_CLK_CSI0,	CLK_PLL5_DIV4,	0x880),
-- 
2.29.2


^ permalink raw reply related	[flat|nested] 5+ messages in thread

* [PATCH 2/2] clk: renesas: r8a779a0: Add THS/TSC clock
  2020-11-26 22:14 [PATCH 0/2] clk: renesas: r8a779a0: Add clocks to support thermal Niklas Söderlund
  2020-11-26 22:14 ` [PATCH 1/2] clk: renesas: r8a779a0: Add CP clock Niklas Söderlund
@ 2020-11-26 22:14 ` Niklas Söderlund
  2020-11-27  9:13   ` Geert Uytterhoeven
  1 sibling, 1 reply; 5+ messages in thread
From: Niklas Söderlund @ 2020-11-26 22:14 UTC (permalink / raw)
  To: Geert Uytterhoeven, linux-clk; +Cc: linux-renesas-soc, Niklas Söderlund

Implement support for the THS/TSC clock on V3U

Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
---
 drivers/clk/renesas/r8a779a0-cpg-mssr.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/clk/renesas/r8a779a0-cpg-mssr.c b/drivers/clk/renesas/r8a779a0-cpg-mssr.c
index 7bf7a98cdb7bb5be..528f5700a02023bb 100644
--- a/drivers/clk/renesas/r8a779a0-cpg-mssr.c
+++ b/drivers/clk/renesas/r8a779a0-cpg-mssr.c
@@ -190,6 +190,7 @@ static const struct mssr_mod_clk r8a779a0_mod_clks[] __initconst = {
 	DEF_MOD("vin35",	827,	R8A779A0_CLK_S1D1),
 	DEF_MOD("vin36",	828,	R8A779A0_CLK_S1D1),
 	DEF_MOD("vin37",	829,	R8A779A0_CLK_S1D1),
+	DEF_MOD("thermal",      919,    R8A779A0_CLK_CP),
 };
 
 static spinlock_t cpg_lock;
-- 
2.29.2


^ permalink raw reply related	[flat|nested] 5+ messages in thread

* Re: [PATCH 1/2] clk: renesas: r8a779a0: Add CP clock
  2020-11-26 22:14 ` [PATCH 1/2] clk: renesas: r8a779a0: Add CP clock Niklas Söderlund
@ 2020-11-27  9:02   ` Geert Uytterhoeven
  0 siblings, 0 replies; 5+ messages in thread
From: Geert Uytterhoeven @ 2020-11-27  9:02 UTC (permalink / raw)
  To: Niklas Söderlund; +Cc: linux-clk, Linux-Renesas

Hi Niklas,

On Thu, Nov 26, 2020 at 11:14 PM Niklas Söderlund
<niklas.soderlund+renesas@ragnatech.se> wrote:
> Implement support for the CP clock on V3U.
>
> Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>

Thanks for your patch!

Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>

Note that this change was also included in "[PATCH/RFC 3/6] clk:
renesas: r8a779a0: Add PFC/GPIO clocks".
https://lore.kernel.org/linux-renesas-soc/20201019120614.22149-4-geert+renesas@glider.be/

Gr{oetje,eeting}s,

                        Geert

-- 
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

^ permalink raw reply	[flat|nested] 5+ messages in thread

* Re: [PATCH 2/2] clk: renesas: r8a779a0: Add THS/TSC clock
  2020-11-26 22:14 ` [PATCH 2/2] clk: renesas: r8a779a0: Add THS/TSC clock Niklas Söderlund
@ 2020-11-27  9:13   ` Geert Uytterhoeven
  0 siblings, 0 replies; 5+ messages in thread
From: Geert Uytterhoeven @ 2020-11-27  9:13 UTC (permalink / raw)
  To: Niklas Söderlund; +Cc: Geert Uytterhoeven, linux-clk, Linux-Renesas

Hi Niklas,

On Thu, Nov 26, 2020 at 11:14 PM Niklas Söderlund
<niklas.soderlund+renesas@ragnatech.se> wrote:
> Implement support for the THS/TSC clock on V3U
>
> Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>

Thanks for your patch!

> --- a/drivers/clk/renesas/r8a779a0-cpg-mssr.c
> +++ b/drivers/clk/renesas/r8a779a0-cpg-mssr.c
> @@ -190,6 +190,7 @@ static const struct mssr_mod_clk r8a779a0_mod_clks[] __initconst = {
>         DEF_MOD("vin35",        827,    R8A779A0_CLK_S1D1),
>         DEF_MOD("vin36",        828,    R8A779A0_CLK_S1D1),
>         DEF_MOD("vin37",        829,    R8A779A0_CLK_S1D1),
> +       DEF_MOD("thermal",      919,    R8A779A0_CLK_CP),
>  };

The R-Car V3U Series User's Manual calls this clock "tsc", and states its
parent is "cl16m".

Gr{oetje,eeting}s,

                        Geert

-- 
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

^ permalink raw reply	[flat|nested] 5+ messages in thread

end of thread, other threads:[~2020-11-27  9:13 UTC | newest]

Thread overview: 5+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2020-11-26 22:14 [PATCH 0/2] clk: renesas: r8a779a0: Add clocks to support thermal Niklas Söderlund
2020-11-26 22:14 ` [PATCH 1/2] clk: renesas: r8a779a0: Add CP clock Niklas Söderlund
2020-11-27  9:02   ` Geert Uytterhoeven
2020-11-26 22:14 ` [PATCH 2/2] clk: renesas: r8a779a0: Add THS/TSC clock Niklas Söderlund
2020-11-27  9:13   ` Geert Uytterhoeven

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