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From: Geert Uytterhoeven <geert@linux-m68k.org>
To: Ulrich Hecht <uli+renesas@fpond.eu>
Cc: Linux-Renesas <linux-renesas-soc@vger.kernel.org>,
	Wolfram Sang <wsa@the-dreams.de>,
	hoai.luu.ub@renesas.com
Subject: Re: [PATCH 02/11] pinctrl: renesas: r8a779a0: Add CANFD pins, groups and functions
Date: Fri, 27 Nov 2020 16:35:48 +0100	[thread overview]
Message-ID: <CAMuHMdXeOpEEdens75Y=kPCOCGn5ROm-CR-wviBdxJU-0-wTQw@mail.gmail.com> (raw)
In-Reply-To: <20201126172154.25625-3-uli+renesas@fpond.eu>

Hi Uli,

On Thu, Nov 26, 2020 at 6:22 PM Ulrich Hecht <uli+renesas@fpond.eu> wrote:
> This patch adds CANFD 0-7 and CANFD clock pinmux support for the
> R8A779A0 (V3U) SoC.
>
> Signed-off-by: Ulrich Hecht <uli+renesas@fpond.eu>

Thanks for your patch!

> --- a/drivers/pinctrl/renesas/pfc-r8a779a0.c
> +++ b/drivers/pinctrl/renesas/pfc-r8a779a0.c

> +/* - CANFD Clock ------------------------------------------------------------ */
> +static const unsigned int canfd_clk_pins[] = {
> +       /* CAN_CLK */
> +       RCAR_GP_PIN(3, 0),
> +};
> +static const unsigned int canfd_clk_mux[] = {
> +       CAN_CLK_MARK,
> +};

The User's Manual calls this "can_clk", so I'm wondering if we should do the
same, like on most R-Car SoCs,to avoid confusing with the internal CANFD
clock.

I know we call it "canfd_clk" on R-Car V3M (it is called that way in the manual)
and on R-Car V3H (either copied from V3M, or changed later in the manual),
the two other SoCs that don't have separate (non-FD) CAN controllers.

Gr{oetje,eeting}s,

                        Geert

-- 
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

  reply	other threads:[~2020-11-27 15:36 UTC|newest]

Thread overview: 26+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-11-26 17:21 [PATCH 00/11] pinctrl: renesas: R8A779A0 (V3U) device support Ulrich Hecht
2020-11-26 17:21 ` [PATCH 01/11] pinctrl: renesas: r8a779a0: Add EtherAVB pins, groups and functions Ulrich Hecht
2020-11-27 14:44   ` Geert Uytterhoeven
2020-11-26 17:21 ` [PATCH 02/11] pinctrl: renesas: r8a779a0: Add CANFD " Ulrich Hecht
2020-11-27 15:35   ` Geert Uytterhoeven [this message]
2020-11-26 17:21 ` [PATCH 03/11] pinctrl: renesas: r8a779a0: Add DU pins, groups and function Ulrich Hecht
2020-11-27 15:50   ` Geert Uytterhoeven
2020-11-26 17:21 ` [PATCH 04/11] pinctrl: renesas: r8a779a0: Add HSCIF pins, groups and functions Ulrich Hecht
2020-11-30 13:31   ` Geert Uytterhoeven
2020-11-26 17:21 ` [PATCH 05/11] pinctrl: renesas: r8a779a0: Add INTC-EX pins, groups and function Ulrich Hecht
2020-11-30 13:33   ` Geert Uytterhoeven
2020-11-26 17:21 ` [PATCH 06/11] pinctrl: renesas: r8a779a0: Add MMC pins, groups and functions Ulrich Hecht
2020-11-30 13:37   ` Geert Uytterhoeven
2020-11-26 17:21 ` [PATCH 07/11] pinctrl: renesas: r8a779a0: Add MSIOF " Ulrich Hecht
2020-11-30 13:43   ` Geert Uytterhoeven
2020-11-26 17:21 ` [PATCH 08/11] pinctrl: renesas: r8a779a0: Add PWM " Ulrich Hecht
2020-11-30 13:45   ` Geert Uytterhoeven
2020-11-26 17:21 ` [PATCH 09/11] pinctrl: renesas: r8a779a0: Add QSPI pins, groups, " Ulrich Hecht
2020-11-30 13:49   ` Geert Uytterhoeven
2020-11-26 17:21 ` [PATCH 10/11] pinctrl: renesas: r8a779a0: Add TMU pins, groups " Ulrich Hecht
2020-11-30 13:57   ` Geert Uytterhoeven
2020-11-26 17:21 ` [PATCH 11/11] pinctrl: renesas: r8a779a0: Add TPU " Ulrich Hecht
2020-11-30 13:59   ` Geert Uytterhoeven
2020-11-27 10:33 ` [PATCH 00/11] pinctrl: renesas: R8A779A0 (V3U) device support Geert Uytterhoeven
2020-11-30  8:24   ` Ulrich Hecht
2020-11-30  9:01     ` Geert Uytterhoeven

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