From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1F804C05027 for ; Mon, 23 Jan 2023 22:36:57 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231681AbjAWWg4 (ORCPT ); Mon, 23 Jan 2023 17:36:56 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:45662 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229956AbjAWWgz (ORCPT ); Mon, 23 Jan 2023 17:36:55 -0500 Received: from perceval.ideasonboard.com (perceval.ideasonboard.com [213.167.242.64]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id CA35137B48 for ; Mon, 23 Jan 2023 14:36:54 -0800 (PST) Received: from pendragon.ideasonboard.com (213-243-189-158.bb.dnainternet.fi [213.243.189.158]) by perceval.ideasonboard.com (Postfix) with ESMTPSA id E96362D9; Mon, 23 Jan 2023 23:36:52 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ideasonboard.com; s=mail; t=1674513413; bh=8BDJk+F8kQpd7sXh8OapTD8OljXi5zdntHPhm75z/6w=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=qvVKZ56JzhxYm5JqP9tlBEn+vA7IJQt8hfqRCrZUzy4MC34OPNSXgo7EjvAOieSPE 5RQUwb/hA9tMX6yo5IUq6m+zmSnSl/62her1/qEE6rYG1pfpM1cz6f0yaGtMbpLP+d rrbXXW0PiHFI9ZjOIbiVFjLKx3WRKUYDpKZWn1iA= Date: Tue, 24 Jan 2023 00:36:49 +0200 From: Laurent Pinchart To: Geert Uytterhoeven Cc: Tomi Valkeinen , Koji Matsuoka , dri-devel@lists.freedesktop.org, linux-renesas-soc@vger.kernel.org, Kieran Bingham , LUU HOAI Subject: Re: [PATCH v3 4/7] drm: rcar-du: lvds: Fix stop sequence Message-ID: References: <20230123104742.227460-1-tomi.valkeinen+renesas@ideasonboard.com> <20230123104742.227460-5-tomi.valkeinen+renesas@ideasonboard.com> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline In-Reply-To: Precedence: bulk List-ID: X-Mailing-List: linux-renesas-soc@vger.kernel.org Hi Geert, On Mon, Jan 23, 2023 at 03:28:08PM +0100, Geert Uytterhoeven wrote: > On Mon, Jan 23, 2023 at 11:48 AM Tomi Valkeinen wrote: > > From: Koji Matsuoka > > > > According to hardware manual, LVDCR0 register must be cleared bit by bit > > when disabling LVDS. > > > > Signed-off-by: Koji Matsuoka > > Signed-off-by: LUU HOAI > > [tomi.valkeinen: simplified the code a bit] > > Signed-off-by: Tomi Valkeinen > > Reviewed-by: Laurent Pinchart > > Thanks for your patch! > > > @@ -544,6 +549,27 @@ static void rcar_lvds_atomic_disable(struct drm_bridge *bridge, > > struct drm_bridge_state *old_bridge_state) > > { > > struct rcar_lvds *lvds = bridge_to_rcar_lvds(bridge); > > + u32 lvdcr0; > > + > > + lvdcr0 = rcar_lvds_read(lvds, LVDCR0); > > + > > + lvdcr0 &= ~LVDCR0_LVRES; > > + rcar_lvds_write(lvds, LVDCR0, lvdcr0); > > + > > + if (lvds->info->quirks & RCAR_LVDS_QUIRK_GEN3_LVEN) { > > + lvdcr0 &= ~LVDCR0_LVEN; > > + rcar_lvds_write(lvds, LVDCR0, lvdcr0); > > + } > > + > > + if (lvds->info->quirks & RCAR_LVDS_QUIRK_PWD) { > > + lvdcr0 &= ~LVDCR0_PWD; > > + rcar_lvds_write(lvds, LVDCR0, lvdcr0); > > + } > > + > > + if (!(lvds->info->quirks & RCAR_LVDS_QUIRK_EXT_PLL)) { > > + lvdcr0 &= ~LVDCR0_PLLON; > > + rcar_lvds_write(lvds, LVDCR0, lvdcr0); > > + } > > Please add a comment explaining why there are multiple register writes, > to avoid an over-zealous janitor "optimizing" the code later. I'll add this comment at the top of the function: /* * Clear the LVDCR0 bits in the order specified by the hardware * documentation, ending with a write of 0 to the full register to * clear all remaining bits. */ > > > > rcar_lvds_write(lvds, LVDCR0, 0); > > rcar_lvds_write(lvds, LVDCR1, 0); -- Regards, Laurent Pinchart