Linux Renesas SOC kernel development
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From: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
To: Miquel Raynal <miquel.raynal@bootlin.com>
Cc: Magnus Damm <magnus.damm@gmail.com>,
	Gareth Williams <gareth.williams.jx@renesas.com>,
	Phil Edworthy <phil.edworthy@renesas.com>,
	Geert Uytterhoeven <geert@linux-m68k.org>,
	Vinod Koul <vkoul@kernel.org>,
	linux-renesas-soc@vger.kernel.org, dmaengine@vger.kernel.org,
	Milan Stevanovic <milan.stevanovic@se.com>,
	Jimmy Lalande <jimmy.lalande@se.com>,
	Pascal Eberhard <pascal.eberhard@se.com>,
	Thomas Petazzoni <thomas.petazzoni@bootlin.com>,
	Herve Codina <herve.codina@bootlin.com>,
	Clement Leger <clement.leger@bootlin.com>,
	Stephen Boyd <sboyd@kernel.org>,
	Michael Turquette <mturquette@baylibre.com>,
	linux-clk@vger.kernel.org, Viresh Kumar <vireshk@kernel.org>,
	Ilpo Jarvinen <ilpo.jarvinen@linux.intel.com>
Subject: Re: [PATCH v7 5/9] dmaengine: dw: dmamux: Introduce RZN1 DMA router support
Date: Wed, 6 Apr 2022 15:47:12 +0300	[thread overview]
Message-ID: <Yk2L0MAMjMnWB2sU@smile.fi.intel.com> (raw)
In-Reply-To: <20220406141346.5caf746c@xps13>

On Wed, Apr 06, 2022 at 02:13:46PM +0200, Miquel Raynal wrote:
> andriy.shevchenko@linux.intel.com wrote on Wed, 6 Apr 2022 11:59:05
> +0300:
> > On Wed, Apr 06, 2022 at 09:49:08AM +0200, Miquel Raynal wrote:
> > > andriy.shevchenko@linux.intel.com wrote on Tue, 5 Apr 2022 17:50:57
> > > +0300:  
> > > > On Tue, Apr 05, 2022 at 10:19:07AM +0200, Miquel Raynal wrote:  

...

> > > > > +#define RZN1_DMAMUX_SPLIT 16  
> > > >
> > > > I would name it more explicitly:
> > > > 
> > > > #define RZN1_DMAMUX_SPLIT_1_0	 16  
> > > 
> > > I am sorry but I don't understand this suffix, which probably means
> > > that it is not as clear as we wish. Do you mind if I stick to
> > > RZN1_DMAMUX_SPLIT?  
> > 
> > The suffix to show that this is the value between part 0 (indexed by 0) and
> > part 1 (indexed by 1) as far as I can see they are different by size. Since
> > they are not equal, the original name without suffix is confusing (I would
> > expect indexing up to 4 in such case).
> 
> They are equivalent in size (0-15/16-31), or aren't we talking about the
> same thing?

Hmm... I have misread something then. To clarify that the portions are equal
perhaps we can name it MAX_LINES or so instead of SPLIT?

-- 
With Best Regards,
Andy Shevchenko



  reply	other threads:[~2022-04-06 15:28 UTC|newest]

Thread overview: 18+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-04-05  8:19 [PATCH v7 0/9] RZN1 DMA support Miquel Raynal
2022-04-05  8:19 ` [PATCH v7 1/9] dt-bindings: dmaengine: Introduce RZN1 dmamux bindings Miquel Raynal
2022-04-05 18:12   ` Rob Herring
2022-04-06  7:31     ` Miquel Raynal
2022-04-05  8:19 ` [PATCH v7 2/9] dt-bindings: clock: r9a06g032-sysctrl: Reference the DMAMUX subnode Miquel Raynal
2022-04-05  8:19 ` [PATCH v7 3/9] dt-bindings: dmaengine: Introduce RZN1 DMA compatible Miquel Raynal
2022-04-05  8:19 ` [PATCH v7 4/9] soc: renesas: rzn1-sysc: Export function to set dmamux Miquel Raynal
2022-04-05  8:19 ` [PATCH v7 5/9] dmaengine: dw: dmamux: Introduce RZN1 DMA router support Miquel Raynal
2022-04-05 14:50   ` Andy Shevchenko
2022-04-06  7:49     ` Miquel Raynal
2022-04-06  8:59       ` Andy Shevchenko
2022-04-06 12:13         ` Miquel Raynal
2022-04-06 12:47           ` Andy Shevchenko [this message]
2022-04-05  8:19 ` [PATCH v7 6/9] clk: renesas: r9a06g032: Probe possible children Miquel Raynal
2022-04-05  8:19 ` [PATCH v7 7/9] dmaengine: dw: Add RZN1 compatible Miquel Raynal
2022-04-05 14:51   ` Andy Shevchenko
2022-04-05  8:19 ` [PATCH v7 8/9] ARM: dts: r9a06g032: Add the two DMA nodes Miquel Raynal
2022-04-05  8:19 ` [PATCH v7 9/9] ARM: dts: r9a06g032: Describe the DMA router Miquel Raynal

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