From: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
To: Miquel Raynal <miquel.raynal@bootlin.com>
Cc: Geert Uytterhoeven <geert+renesas@glider.be>,
Magnus Damm <magnus.damm@gmail.com>,
Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
Jiri Slaby <jirislaby@kernel.org>,
linux-renesas-soc@vger.kernel.org, linux-serial@vger.kernel.org,
Milan Stevanovic <milan.stevanovic@se.com>,
Jimmy Lalande <jimmy.lalande@se.com>,
Pascal Eberhard <pascal.eberhard@se.com>,
Thomas Petazzoni <thomas.petazzoni@bootlin.com>,
Herve Codina <herve.codina@bootlin.com>,
Clement Leger <clement.leger@bootlin.com>,
Ilpo Jarvinen <ilpo.jarvinen@linux.intel.com>
Subject: Re: [PATCH v5 04/11] serial: 8250: dw: Move the USR register to pdata
Date: Wed, 13 Apr 2022 13:50:04 +0300 [thread overview]
Message-ID: <Ylaq3M0FyJsklZ8O@smile.fi.intel.com> (raw)
In-Reply-To: <20220413075141.72777-5-miquel.raynal@bootlin.com>
On Wed, Apr 13, 2022 at 09:51:34AM +0200, Miquel Raynal wrote:
> This offset is a good candidate to pdata's because it changes depending
> on the vendor implementation. Let's move the usr_reg entry from regular
> to pdata. This way we can drop initializing it at run time.
>
> Let's also use a define for it instead of defining only the default
> value.
Yep, thanks!
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
> Suggested-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
> ---
> drivers/tty/serial/8250/8250_dw.c | 11 ++++++++---
> drivers/tty/serial/8250/8250_dwlib.h | 2 +-
> 2 files changed, 9 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/tty/serial/8250/8250_dw.c b/drivers/tty/serial/8250/8250_dw.c
> index 93b112f3bc49..babf5dc597a8 100644
> --- a/drivers/tty/serial/8250/8250_dw.c
> +++ b/drivers/tty/serial/8250/8250_dw.c
> @@ -35,6 +35,8 @@
> /* Offsets for the DesignWare specific registers */
> #define DW_UART_USR 0x1f /* UART Status Register */
>
> +#define OCTEON_UART_USR 0x27 /* UART Status Register */
> +
> /* DesignWare specific register fields */
> #define DW_UART_MCR_SIRE BIT(6)
>
> @@ -251,7 +253,7 @@ static int dw8250_handle_irq(struct uart_port *p)
>
> if ((iir & UART_IIR_BUSY) == UART_IIR_BUSY) {
> /* Clear the USR */
> - (void)p->serial_in(p, d->usr_reg);
> + (void)p->serial_in(p, d->pdata->usr_reg);
>
> return 1;
> }
> @@ -387,7 +389,6 @@ static void dw8250_quirks(struct uart_port *p, struct dw8250_data *data)
> p->serial_out = dw8250_serial_outq;
> p->flags = UPF_SKIP_TEST | UPF_SHARE_IRQ | UPF_FIXED_TYPE;
> p->type = PORT_OCTEON;
> - data->usr_reg = 0x27;
> data->skip_autocfg = true;
> }
> #endif
> @@ -462,7 +463,6 @@ static int dw8250_probe(struct platform_device *pdev)
> return -ENOMEM;
>
> data->data.dma.fn = dw8250_fallback_dma_filter;
> - data->usr_reg = DW_UART_USR;
> data->pdata = device_get_match_data(p->dev);
> p->private_data = &data->data;
>
> @@ -681,20 +681,25 @@ static const struct dev_pm_ops dw8250_pm_ops = {
> };
>
> static const struct dw8250_platform_data dw8250_dw_apb = {
> + .usr_reg = DW_UART_USR,
> };
>
> static const struct dw8250_platform_data dw8250_octeon_3860_data = {
> + .usr_reg = OCTEON_UART_USR,
> .quirks = DW_UART_QUIRK_OCTEON,
> };
>
> static const struct dw8250_platform_data dw8250_armada_38x_data = {
> + .usr_reg = DW_UART_USR,
> .quirks = DW_UART_QUIRK_ARMADA_38X,
> };
>
> static const struct dw8250_platform_data dw8250_renesas_rzn1_data = {
> + .usr_reg = DW_UART_USR,
> };
>
> static const struct dw8250_platform_data dw8250_starfive_jh7100_data = {
> + .usr_reg = DW_UART_USR,
> .quirks = DW_UART_QUIRK_SKIP_SET_RATE,
> };
>
> diff --git a/drivers/tty/serial/8250/8250_dwlib.h b/drivers/tty/serial/8250/8250_dwlib.h
> index 68bb81bee660..0df6baa6eaee 100644
> --- a/drivers/tty/serial/8250/8250_dwlib.h
> +++ b/drivers/tty/serial/8250/8250_dwlib.h
> @@ -22,6 +22,7 @@ struct dw8250_port_data {
> };
>
> struct dw8250_platform_data {
> + u8 usr_reg;
> unsigned int quirks;
> };
>
> @@ -29,7 +30,6 @@ struct dw8250_data {
> struct dw8250_port_data data;
> const struct dw8250_platform_data *pdata;
>
> - u8 usr_reg;
> int msr_mask_on;
> int msr_mask_off;
> struct clk *clk;
> --
> 2.27.0
>
--
With Best Regards,
Andy Shevchenko
next prev parent reply other threads:[~2022-04-13 10:53 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-04-13 7:51 [PATCH v5 00/11] serial: 8250: dw: RZN1 DMA support Miquel Raynal
2022-04-13 7:51 ` [PATCH v5 01/11] serial: 8250: dw: Move definitions to the shared header Miquel Raynal
2022-04-13 7:51 ` [PATCH v5 02/11] serial: 8250: dw: Use the device API Miquel Raynal
2022-04-13 7:51 ` [PATCH v5 03/11] serial: 8250: dw: Create a more generic platform data structure Miquel Raynal
2022-04-13 7:51 ` [PATCH v5 04/11] serial: 8250: dw: Move the USR register to pdata Miquel Raynal
2022-04-13 10:50 ` Andy Shevchenko [this message]
2022-04-13 7:51 ` [PATCH v5 05/11] serial: 8250: dw: Allow to use a fallback CPR value if not synthesized Miquel Raynal
2022-04-13 10:53 ` Andy Shevchenko
2022-04-13 7:51 ` [PATCH v5 06/11] serial: 8250: dma: Allow driver operations before starting DMA transfers Miquel Raynal
2022-04-13 7:51 ` [PATCH v5 07/11] serial: 8250: dw: Introduce an rx_timeout variable in the IRQ path Miquel Raynal
2022-04-13 7:51 ` [PATCH v5 08/11] serial: 8250: dw: Move the IO accessors to 8250_dwlib.h Miquel Raynal
2022-04-13 10:55 ` Andy Shevchenko
2022-04-13 7:51 ` [PATCH v5 09/11] serial: 8250: dw: Add support for DMA flow controlling devices Miquel Raynal
2022-04-13 10:58 ` Andy Shevchenko
2022-04-13 7:51 ` [PATCH v5 10/11] serial: 8250: dw: Improve RZN1 support Miquel Raynal
2022-04-13 7:51 ` [PATCH v5 11/11] ARM: dts: r9a06g032: Fill the UART DMA properties Miquel Raynal
2022-04-15 9:36 ` [PATCH v5 00/11] serial: 8250: dw: RZN1 DMA support Greg Kroah-Hartman
2022-04-20 8:56 ` Miquel Raynal
2022-04-21 9:30 ` Miquel Raynal
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