[PATCH 3/3] soc: renesas: add X5H PRR support

Wolfram Sang
2026-03-17T13:06:58Z

On this SoC, PRR is now inside the MFIS memory block, so we need to
access it similar to e.g. RZ/G2L.

Suggested-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
---
drivers/soc/renesas/renesas-soc.c | 8 +++++++-
1 file changed, 7 insertions(+), 1 deletion(-)

diff --git a/drivers/soc/renesas/renesas-soc.c b/drivers/soc/renesas/renesas-soc.c
index 38ff0b823bda..60b09020c935 100644
--- a/drivers/soc/renesas/renesas-soc.c
+++ b/drivers/soc/renesas/renesas-soc.c
@@ -442,8 +442,14 @@ static const struct renesas_id id_prr __initconst = {
.mask = 0xff00,
};

+static const struct renesas_id id_mfis __initconst = {
+ .offset = 0x44,
+ .mask = 0xff00,
+};
+
static const struct of_device_id renesas_ids[] __initconst = {
{ .compatible = "renesas,bsid", .data = &id_bsid },
+ { .compatible = "renesas,r8a78000-mfis", .data = &id_mfis },
{ .compatible = "renesas,r9a07g043-sysc", .data = &id_rzg2l },
{ .compatible = "renesas,r9a07g044-sysc", .data = &id_rzg2l },
{ .compatible = "renesas,r9a07g054-sysc", .data = &id_rzg2l },
@@ -501,7 +507,7 @@ static int __init renesas_soc_init(void)
product = readl(chipid + id->offset);
iounmap(chipid);

- if (id == &id_prr) {
+ if (id == &id_prr || id == &id_mfis) {
/* R-Car M3-W ES1.1 incorrectly identifies as ES2.0 */
if ((product & 0x7fff) == 0x5210)
product ^= 0x11;
--
2.51.0