* [PATCH 01/30] arm64: dts: r8a7795: add FCPF device nodes
2016-09-08 7:43 [GIT PULL] Renesas ARM64 Based SoC DT Updates for v4.9 Simon Horman
@ 2016-09-08 7:42 ` Simon Horman
2016-09-08 7:42 ` [PATCH 02/30] arm64: dts: r8a7795: add FDP1 " Simon Horman
` (29 subsequent siblings)
30 siblings, 0 replies; 32+ messages in thread
From: Simon Horman @ 2016-09-08 7:42 UTC (permalink / raw)
To: linux-renesas-soc
Cc: linux-arm-kernel, Magnus Damm, Kieran Bingham, Kieran Bingham,
Simon Horman
From: Kieran Bingham <kieran@ksquared.org.uk>
Provide nodes for the FCP devices dedicated to the FDP device channels.
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Kieran Bingham <kieran@bingham.xyz>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm64/boot/dts/renesas/r8a7795.dtsi | 21 +++++++++++++++++++++
1 file changed, 21 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/r8a7795.dtsi b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
index b902356873c2..8c85b50d306b 100644
--- a/arch/arm64/boot/dts/renesas/r8a7795.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
@@ -1273,5 +1273,26 @@
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
status = "disabled";
};
+
+ fcpf0: fcp@fe950000 {
+ compatible = "renesas,r8a7795-fcpf", "renesas,fcpf";
+ reg = <0 0xfe950000 0 0x200>;
+ clocks = <&cpg CPG_MOD 615>;
+ power-domains = <&sysc R8A7795_PD_A3VP>;
+ };
+
+ fcpf1: fcp@fe951000 {
+ compatible = "renesas,r8a7795-fcpf", "renesas,fcpf";
+ reg = <0 0xfe951000 0 0x200>;
+ clocks = <&cpg CPG_MOD 614>;
+ power-domains = <&sysc R8A7795_PD_A3VP>;
+ };
+
+ fcpf2: fcp@fe952000 {
+ compatible = "renesas,r8a7795-fcpf", "renesas,fcpf";
+ reg = <0 0xfe952000 0 0x200>;
+ clocks = <&cpg CPG_MOD 613>;
+ power-domains = <&sysc R8A7795_PD_A3VP>;
+ };
};
};
--
2.7.0.rc3.207.g0ac5344
^ permalink raw reply related [flat|nested] 32+ messages in thread* [PATCH 02/30] arm64: dts: r8a7795: add FDP1 device nodes
2016-09-08 7:43 [GIT PULL] Renesas ARM64 Based SoC DT Updates for v4.9 Simon Horman
2016-09-08 7:42 ` [PATCH 01/30] arm64: dts: r8a7795: add FCPF device nodes Simon Horman
@ 2016-09-08 7:42 ` Simon Horman
2016-09-08 7:42 ` [PATCH 03/30] arm64: dts: r8a7795: set maximum frequency for SDHI clocks Simon Horman
` (28 subsequent siblings)
30 siblings, 0 replies; 32+ messages in thread
From: Simon Horman @ 2016-09-08 7:42 UTC (permalink / raw)
To: linux-renesas-soc
Cc: linux-arm-kernel, Magnus Damm, Kieran Bingham, Kieran Bingham,
Simon Horman
From: Kieran Bingham <kieran@ksquared.org.uk>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Kieran Bingham <kieran@bingham.xyz>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm64/boot/dts/renesas/r8a7795.dtsi | 27 +++++++++++++++++++++++++++
1 file changed, 27 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/r8a7795.dtsi b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
index 8c85b50d306b..99953ca9a45e 100644
--- a/arch/arm64/boot/dts/renesas/r8a7795.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
@@ -1294,5 +1294,32 @@
clocks = <&cpg CPG_MOD 613>;
power-domains = <&sysc R8A7795_PD_A3VP>;
};
+
+ fdp1@fe940000 {
+ compatible = "renesas,fdp1";
+ reg = <0 0xfe940000 0 0x2400>;
+ interrupts = <GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 119>;
+ power-domains = <&sysc R8A7795_PD_A3VP>;
+ renesas,fcp = <&fcpf0>;
+ };
+
+ fdp1@fe944000 {
+ compatible = "renesas,fdp1";
+ reg = <0 0xfe944000 0 0x2400>;
+ interrupts = <GIC_SPI 263 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 118>;
+ power-domains = <&sysc R8A7795_PD_A3VP>;
+ renesas,fcp = <&fcpf1>;
+ };
+
+ fdp1@fe948000 {
+ compatible = "renesas,fdp1";
+ reg = <0 0xfe948000 0 0x2400>;
+ interrupts = <GIC_SPI 264 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 117>;
+ power-domains = <&sysc R8A7795_PD_A3VP>;
+ renesas,fcp = <&fcpf2>;
+ };
};
};
--
2.7.0.rc3.207.g0ac5344
^ permalink raw reply related [flat|nested] 32+ messages in thread* [PATCH 03/30] arm64: dts: r8a7795: set maximum frequency for SDHI clocks
2016-09-08 7:43 [GIT PULL] Renesas ARM64 Based SoC DT Updates for v4.9 Simon Horman
2016-09-08 7:42 ` [PATCH 01/30] arm64: dts: r8a7795: add FCPF device nodes Simon Horman
2016-09-08 7:42 ` [PATCH 02/30] arm64: dts: r8a7795: add FDP1 " Simon Horman
@ 2016-09-08 7:42 ` Simon Horman
2016-09-08 7:43 ` [PATCH 04/30] arm64: dts: r8a7795: Add HSUSB device node Simon Horman
` (27 subsequent siblings)
30 siblings, 0 replies; 32+ messages in thread
From: Simon Horman @ 2016-09-08 7:42 UTC (permalink / raw)
To: linux-renesas-soc
Cc: linux-arm-kernel, Magnus Damm, Wolfram Sang, Simon Horman
From: Wolfram Sang <wsa+renesas@sang-engineering.com>
Define the upper limit otherwise the driver cannot utilize max speeds.
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm64/boot/dts/renesas/r8a7795.dtsi | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/r8a7795.dtsi b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
index 99953ca9a45e..834a12a13735 100644
--- a/arch/arm64/boot/dts/renesas/r8a7795.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
@@ -1098,6 +1098,7 @@
reg = <0 0xee100000 0 0x2000>;
interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 314>;
+ max-frequency = <200000000>;
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
status = "disabled";
};
@@ -1107,6 +1108,7 @@
reg = <0 0xee120000 0 0x2000>;
interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 313>;
+ max-frequency = <200000000>;
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
status = "disabled";
};
@@ -1116,6 +1118,7 @@
reg = <0 0xee140000 0 0x2000>;
interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 312>;
+ max-frequency = <200000000>;
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
cap-mmc-highspeed;
status = "disabled";
@@ -1126,6 +1129,7 @@
reg = <0 0xee160000 0 0x2000>;
interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 311>;
+ max-frequency = <200000000>;
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
cap-mmc-highspeed;
status = "disabled";
--
2.7.0.rc3.207.g0ac5344
^ permalink raw reply related [flat|nested] 32+ messages in thread* [PATCH 04/30] arm64: dts: r8a7795: Add HSUSB device node
2016-09-08 7:43 [GIT PULL] Renesas ARM64 Based SoC DT Updates for v4.9 Simon Horman
` (2 preceding siblings ...)
2016-09-08 7:42 ` [PATCH 03/30] arm64: dts: r8a7795: set maximum frequency for SDHI clocks Simon Horman
@ 2016-09-08 7:43 ` Simon Horman
2016-09-08 7:43 ` [PATCH 05/30] arm64: dts: r8a7795: salvator-x: enable usb2_phy of channel 0 Simon Horman
` (26 subsequent siblings)
30 siblings, 0 replies; 32+ messages in thread
From: Simon Horman @ 2016-09-08 7:43 UTC (permalink / raw)
To: linux-renesas-soc
Cc: linux-arm-kernel, Magnus Damm, Yoshihiro Shimoda, Simon Horman
From: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm64/boot/dts/renesas/r8a7795.dtsi | 17 +++++++++++++++++
1 file changed, 17 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/r8a7795.dtsi b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
index 834a12a13735..58376e72404b 100644
--- a/arch/arm64/boot/dts/renesas/r8a7795.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
@@ -1228,6 +1228,23 @@
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
status = "disabled";
};
+
+ hsusb: usb@e6590000 {
+ compatible = "renesas,usbhs-r8a7795",
+ "renesas,rcar-gen3-usbhs";
+ reg = <0 0xe6590000 0 0x100>;
+ interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 704>;
+ dmas = <&usb_dmac0 0>, <&usb_dmac0 1>,
+ <&usb_dmac1 0>, <&usb_dmac1 1>;
+ dma-names = "ch0", "ch1", "ch2", "ch3";
+ renesas,buswait = <11>;
+ phys = <&usb2_phy0>;
+ phy-names = "usb";
+ power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
+ status = "disabled";
+ };
+
pciec0: pcie@fe000000 {
compatible = "renesas,pcie-r8a7795";
reg = <0 0xfe000000 0 0x80000>;
--
2.7.0.rc3.207.g0ac5344
^ permalink raw reply related [flat|nested] 32+ messages in thread* [PATCH 05/30] arm64: dts: r8a7795: salvator-x: enable usb2_phy of channel 0
2016-09-08 7:43 [GIT PULL] Renesas ARM64 Based SoC DT Updates for v4.9 Simon Horman
` (3 preceding siblings ...)
2016-09-08 7:43 ` [PATCH 04/30] arm64: dts: r8a7795: Add HSUSB device node Simon Horman
@ 2016-09-08 7:43 ` Simon Horman
2016-09-08 7:43 ` [PATCH 06/30] arm64: dts: r8a7795: salvator-x: enable USB 2.0 Host " Simon Horman
` (25 subsequent siblings)
30 siblings, 0 replies; 32+ messages in thread
From: Simon Horman @ 2016-09-08 7:43 UTC (permalink / raw)
To: linux-renesas-soc
Cc: linux-arm-kernel, Magnus Damm, Yoshihiro Shimoda, Simon Horman
From: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
This patch also adds a regulator node for USB2.0 to handle VBUS on/off
by the phy-rcar-gen3-usb2 driver.
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts | 24 ++++++++++++++++++++++
1 file changed, 24 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts b/arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts
index 98f02631a0f0..8c8bfdccdc2b 100644
--- a/arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts
+++ b/arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts
@@ -110,6 +110,17 @@
1800000 0>;
};
+ vbus0_usb2: regulator-vbus0-usb2 {
+ compatible = "regulator-fixed";
+
+ regulator-name = "USB20_VBUS0";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+
+ gpio = <&gpio6 16 GPIO_ACTIVE_HIGH>;
+ enable-active-high;
+ };
+
audio_clkout: audio_clkout {
/*
* This is same as <&rcar_sound 0>
@@ -193,6 +204,11 @@
function = "audio_clk";
};
+ usb0_pins: usb0 {
+ groups = "usb0";
+ function = "usb0";
+ };
+
usb1_pins: usb1 {
groups = "usb1";
function = "usb1";
@@ -369,6 +385,14 @@
status = "okay";
};
+&usb2_phy0 {
+ pinctrl-0 = <&usb0_pins>;
+ pinctrl-names = "default";
+
+ vbus-supply = <&vbus0_usb2>;
+ status = "okay";
+};
+
&usb2_phy1 {
pinctrl-0 = <&usb1_pins>;
pinctrl-names = "default";
--
2.7.0.rc3.207.g0ac5344
^ permalink raw reply related [flat|nested] 32+ messages in thread* [PATCH 06/30] arm64: dts: r8a7795: salvator-x: enable USB 2.0 Host channel 0
2016-09-08 7:43 [GIT PULL] Renesas ARM64 Based SoC DT Updates for v4.9 Simon Horman
` (4 preceding siblings ...)
2016-09-08 7:43 ` [PATCH 05/30] arm64: dts: r8a7795: salvator-x: enable usb2_phy of channel 0 Simon Horman
@ 2016-09-08 7:43 ` Simon Horman
2016-09-08 7:43 ` [PATCH 07/30] arm64: dts: r8a7795: salvator-x: enable HSUSB Simon Horman
` (24 subsequent siblings)
30 siblings, 0 replies; 32+ messages in thread
From: Simon Horman @ 2016-09-08 7:43 UTC (permalink / raw)
To: linux-renesas-soc
Cc: linux-arm-kernel, Magnus Damm, Yoshihiro Shimoda, Simon Horman
From: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
We have to set SW15 to pin 2-3 side on the board before we use CN9
as USB host or peripheral.
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts b/arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts
index 8c8bfdccdc2b..c0e6e8f7c7d8 100644
--- a/arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts
+++ b/arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts
@@ -407,6 +407,10 @@
status = "okay";
};
+&ehci0 {
+ status = "okay";
+};
+
&ehci1 {
status = "okay";
};
@@ -415,6 +419,10 @@
status = "okay";
};
+&ohci0 {
+ status = "okay";
+};
+
&ohci1 {
status = "okay";
};
--
2.7.0.rc3.207.g0ac5344
^ permalink raw reply related [flat|nested] 32+ messages in thread* [PATCH 07/30] arm64: dts: r8a7795: salvator-x: enable HSUSB
2016-09-08 7:43 [GIT PULL] Renesas ARM64 Based SoC DT Updates for v4.9 Simon Horman
` (5 preceding siblings ...)
2016-09-08 7:43 ` [PATCH 06/30] arm64: dts: r8a7795: salvator-x: enable USB 2.0 Host " Simon Horman
@ 2016-09-08 7:43 ` Simon Horman
2016-09-08 7:43 ` [PATCH 08/30] arm64: dts: renesas: r8a7795: Add FCPV nodes Simon Horman
` (23 subsequent siblings)
30 siblings, 0 replies; 32+ messages in thread
From: Simon Horman @ 2016-09-08 7:43 UTC (permalink / raw)
To: linux-renesas-soc
Cc: linux-arm-kernel, Magnus Damm, Yoshihiro Shimoda, Simon Horman
From: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts b/arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts
index c0e6e8f7c7d8..4332ec7bb38c 100644
--- a/arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts
+++ b/arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts
@@ -431,6 +431,10 @@
status = "okay";
};
+&hsusb {
+ status = "okay";
+};
+
&pcie_bus_clk {
clock-frequency = <100000000>;
status = "okay";
--
2.7.0.rc3.207.g0ac5344
^ permalink raw reply related [flat|nested] 32+ messages in thread* [PATCH 08/30] arm64: dts: renesas: r8a7795: Add FCPV nodes
2016-09-08 7:43 [GIT PULL] Renesas ARM64 Based SoC DT Updates for v4.9 Simon Horman
` (6 preceding siblings ...)
2016-09-08 7:43 ` [PATCH 07/30] arm64: dts: r8a7795: salvator-x: enable HSUSB Simon Horman
@ 2016-09-08 7:43 ` Simon Horman
2016-09-08 7:43 ` [PATCH 09/30] arm64: dts: renesas: r8a7795: Add VSP instances Simon Horman
` (22 subsequent siblings)
30 siblings, 0 replies; 32+ messages in thread
From: Simon Horman @ 2016-09-08 7:43 UTC (permalink / raw)
To: linux-renesas-soc
Cc: linux-arm-kernel, Magnus Damm, Laurent Pinchart, Simon Horman
From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
The FCPs handle the interface between various IP cores and memory. Add
the instances related to the VSP2s.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm64/boot/dts/renesas/r8a7795.dtsi | 63 ++++++++++++++++++++++++++++++++
1 file changed, 63 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/r8a7795.dtsi b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
index 58376e72404b..fe7725d1d131 100644
--- a/arch/arm64/boot/dts/renesas/r8a7795.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
@@ -1295,6 +1295,13 @@
status = "disabled";
};
+ fcpvb1: fcp@fe92f000 {
+ compatible = "renesas,r8a7795-fcpv", "renesas,fcpv";
+ reg = <0 0xfe92f000 0 0x200>;
+ clocks = <&cpg CPG_MOD 606>;
+ power-domains = <&sysc R8A7795_PD_A3VP>;
+ };
+
fcpf0: fcp@fe950000 {
compatible = "renesas,r8a7795-fcpf", "renesas,fcpf";
reg = <0 0xfe950000 0 0x200>;
@@ -1316,6 +1323,62 @@
power-domains = <&sysc R8A7795_PD_A3VP>;
};
+ fcpvb0: fcp@fe96f000 {
+ compatible = "renesas,r8a7795-fcpv", "renesas,fcpv";
+ reg = <0 0xfe96f000 0 0x200>;
+ clocks = <&cpg CPG_MOD 607>;
+ power-domains = <&sysc R8A7795_PD_A3VP>;
+ };
+
+ fcpvi0: fcp@fe9af000 {
+ compatible = "renesas,r8a7795-fcpv", "renesas,fcpv";
+ reg = <0 0xfe9af000 0 0x200>;
+ clocks = <&cpg CPG_MOD 611>;
+ power-domains = <&sysc R8A7795_PD_A3VP>;
+ };
+
+ fcpvi1: fcp@fe9bf000 {
+ compatible = "renesas,r8a7795-fcpv", "renesas,fcpv";
+ reg = <0 0xfe9bf000 0 0x200>;
+ clocks = <&cpg CPG_MOD 610>;
+ power-domains = <&sysc R8A7795_PD_A3VP>;
+ };
+
+ fcpvi2: fcp@fe9cf000 {
+ compatible = "renesas,r8a7795-fcpv", "renesas,fcpv";
+ reg = <0 0xfe9cf000 0 0x200>;
+ clocks = <&cpg CPG_MOD 609>;
+ power-domains = <&sysc R8A7795_PD_A3VP>;
+ };
+
+ fcpvd0: fcp@fea27000 {
+ compatible = "renesas,r8a7795-fcpv", "renesas,fcpv";
+ reg = <0 0xfea27000 0 0x200>;
+ clocks = <&cpg CPG_MOD 603>;
+ power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
+ };
+
+ fcpvd1: fcp@fea2f000 {
+ compatible = "renesas,r8a7795-fcpv", "renesas,fcpv";
+ reg = <0 0xfea2f000 0 0x200>;
+ clocks = <&cpg CPG_MOD 602>;
+ power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
+ };
+
+ fcpvd2: fcp@fea37000 {
+ compatible = "renesas,r8a7795-fcpv", "renesas,fcpv";
+ reg = <0 0xfea37000 0 0x200>;
+ clocks = <&cpg CPG_MOD 601>;
+ power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
+ };
+
+ fcpvd3: fcp@fea3f000 {
+ compatible = "renesas,r8a7795-fcpv", "renesas,fcpv";
+ reg = <0 0xfea3f000 0 0x200>;
+ clocks = <&cpg CPG_MOD 600>;
+ power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
+ };
+
fdp1@fe940000 {
compatible = "renesas,fdp1";
reg = <0 0xfe940000 0 0x2400>;
--
2.7.0.rc3.207.g0ac5344
^ permalink raw reply related [flat|nested] 32+ messages in thread* [PATCH 09/30] arm64: dts: renesas: r8a7795: Add VSP instances
2016-09-08 7:43 [GIT PULL] Renesas ARM64 Based SoC DT Updates for v4.9 Simon Horman
` (7 preceding siblings ...)
2016-09-08 7:43 ` [PATCH 08/30] arm64: dts: renesas: r8a7795: Add FCPV nodes Simon Horman
@ 2016-09-08 7:43 ` Simon Horman
2016-09-08 7:43 ` [PATCH 10/30] arm64: dts: renesas: r8a7795: Add DU device to DT Simon Horman
` (21 subsequent siblings)
30 siblings, 0 replies; 32+ messages in thread
From: Simon Horman @ 2016-09-08 7:43 UTC (permalink / raw)
To: linux-renesas-soc
Cc: linux-arm-kernel, Magnus Damm, Laurent Pinchart, Simon Horman
From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
The r8a7795 has 9 VSP instances.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm64/boot/dts/renesas/r8a7795.dtsi | 90 ++++++++++++++++++++++++++++++++
1 file changed, 90 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/r8a7795.dtsi b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
index fe7725d1d131..19daa6a88312 100644
--- a/arch/arm64/boot/dts/renesas/r8a7795.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
@@ -1295,6 +1295,16 @@
status = "disabled";
};
+ vspbc: vsp@fe920000 {
+ compatible = "renesas,vsp2";
+ reg = <0 0xfe920000 0 0x8000>;
+ interrupts = <GIC_SPI 465 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 624>;
+ power-domains = <&sysc R8A7795_PD_A3VP>;
+
+ renesas,fcp = <&fcpvb1>;
+ };
+
fcpvb1: fcp@fe92f000 {
compatible = "renesas,r8a7795-fcpv", "renesas,fcpv";
reg = <0 0xfe92f000 0 0x200>;
@@ -1323,6 +1333,16 @@
power-domains = <&sysc R8A7795_PD_A3VP>;
};
+ vspbd: vsp@fe960000 {
+ compatible = "renesas,vsp2";
+ reg = <0 0xfe960000 0 0x8000>;
+ interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 626>;
+ power-domains = <&sysc R8A7795_PD_A3VP>;
+
+ renesas,fcp = <&fcpvb0>;
+ };
+
fcpvb0: fcp@fe96f000 {
compatible = "renesas,r8a7795-fcpv", "renesas,fcpv";
reg = <0 0xfe96f000 0 0x200>;
@@ -1330,6 +1350,16 @@
power-domains = <&sysc R8A7795_PD_A3VP>;
};
+ vspi0: vsp@fe9a0000 {
+ compatible = "renesas,vsp2";
+ reg = <0 0xfe9a0000 0 0x8000>;
+ interrupts = <GIC_SPI 444 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 631>;
+ power-domains = <&sysc R8A7795_PD_A3VP>;
+
+ renesas,fcp = <&fcpvi0>;
+ };
+
fcpvi0: fcp@fe9af000 {
compatible = "renesas,r8a7795-fcpv", "renesas,fcpv";
reg = <0 0xfe9af000 0 0x200>;
@@ -1337,6 +1367,16 @@
power-domains = <&sysc R8A7795_PD_A3VP>;
};
+ vspi1: vsp@fe9b0000 {
+ compatible = "renesas,vsp2";
+ reg = <0 0xfe9b0000 0 0x8000>;
+ interrupts = <GIC_SPI 445 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 630>;
+ power-domains = <&sysc R8A7795_PD_A3VP>;
+
+ renesas,fcp = <&fcpvi1>;
+ };
+
fcpvi1: fcp@fe9bf000 {
compatible = "renesas,r8a7795-fcpv", "renesas,fcpv";
reg = <0 0xfe9bf000 0 0x200>;
@@ -1344,6 +1384,16 @@
power-domains = <&sysc R8A7795_PD_A3VP>;
};
+ vspi2: vsp@fe9c0000 {
+ compatible = "renesas,vsp2";
+ reg = <0 0xfe9c0000 0 0x8000>;
+ interrupts = <GIC_SPI 446 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 629>;
+ power-domains = <&sysc R8A7795_PD_A3VP>;
+
+ renesas,fcp = <&fcpvi2>;
+ };
+
fcpvi2: fcp@fe9cf000 {
compatible = "renesas,r8a7795-fcpv", "renesas,fcpv";
reg = <0 0xfe9cf000 0 0x200>;
@@ -1351,6 +1401,16 @@
power-domains = <&sysc R8A7795_PD_A3VP>;
};
+ vspd0: vsp@fea20000 {
+ compatible = "renesas,vsp2";
+ reg = <0 0xfea20000 0 0x4000>;
+ interrupts = <GIC_SPI 466 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 623>;
+ power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
+
+ renesas,fcp = <&fcpvd0>;
+ };
+
fcpvd0: fcp@fea27000 {
compatible = "renesas,r8a7795-fcpv", "renesas,fcpv";
reg = <0 0xfea27000 0 0x200>;
@@ -1358,6 +1418,16 @@
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
};
+ vspd1: vsp@fea28000 {
+ compatible = "renesas,vsp2";
+ reg = <0 0xfea28000 0 0x4000>;
+ interrupts = <GIC_SPI 467 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 622>;
+ power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
+
+ renesas,fcp = <&fcpvd1>;
+ };
+
fcpvd1: fcp@fea2f000 {
compatible = "renesas,r8a7795-fcpv", "renesas,fcpv";
reg = <0 0xfea2f000 0 0x200>;
@@ -1365,6 +1435,16 @@
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
};
+ vspd2: vsp@fea30000 {
+ compatible = "renesas,vsp2";
+ reg = <0 0xfea30000 0 0x4000>;
+ interrupts = <GIC_SPI 468 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 621>;
+ power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
+
+ renesas,fcp = <&fcpvd2>;
+ };
+
fcpvd2: fcp@fea37000 {
compatible = "renesas,r8a7795-fcpv", "renesas,fcpv";
reg = <0 0xfea37000 0 0x200>;
@@ -1372,6 +1452,16 @@
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
};
+ vspd3: vsp@fea38000 {
+ compatible = "renesas,vsp2";
+ reg = <0 0xfea38000 0 0x4000>;
+ interrupts = <GIC_SPI 469 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 620>;
+ power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
+
+ renesas,fcp = <&fcpvd3>;
+ };
+
fcpvd3: fcp@fea3f000 {
compatible = "renesas,r8a7795-fcpv", "renesas,fcpv";
reg = <0 0xfea3f000 0 0x200>;
--
2.7.0.rc3.207.g0ac5344
^ permalink raw reply related [flat|nested] 32+ messages in thread* [PATCH 10/30] arm64: dts: renesas: r8a7795: Add DU device to DT
2016-09-08 7:43 [GIT PULL] Renesas ARM64 Based SoC DT Updates for v4.9 Simon Horman
` (8 preceding siblings ...)
2016-09-08 7:43 ` [PATCH 09/30] arm64: dts: renesas: r8a7795: Add VSP instances Simon Horman
@ 2016-09-08 7:43 ` Simon Horman
2016-09-08 7:43 ` [PATCH 11/30] arm64: dts: r8a7795: renesas: salvator-x: Enable DU Simon Horman
` (20 subsequent siblings)
30 siblings, 0 replies; 32+ messages in thread
From: Simon Horman @ 2016-09-08 7:43 UTC (permalink / raw)
To: linux-renesas-soc
Cc: linux-arm-kernel, Magnus Damm, Laurent Pinchart, Simon Horman
From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Add the DU device to r8a7795.dtsi in a disabled state.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm64/boot/dts/renesas/r8a7795.dtsi | 46 ++++++++++++++++++++++++++++++++
1 file changed, 46 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/r8a7795.dtsi b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
index 19daa6a88312..5d59e7fe7bbc 100644
--- a/arch/arm64/boot/dts/renesas/r8a7795.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
@@ -1495,5 +1495,51 @@
power-domains = <&sysc R8A7795_PD_A3VP>;
renesas,fcp = <&fcpf2>;
};
+
+ du: display@feb00000 {
+ compatible = "renesas,du-r8a7795";
+ reg = <0 0xfeb00000 0 0x80000>,
+ <0 0xfeb90000 0 0x14>;
+ reg-names = "du", "lvds.0";
+ interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 269 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 270 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 724>,
+ <&cpg CPG_MOD 723>,
+ <&cpg CPG_MOD 722>,
+ <&cpg CPG_MOD 721>,
+ <&cpg CPG_MOD 727>;
+ clock-names = "du.0", "du.1", "du.2", "du.3", "lvds.0";
+ status = "disabled";
+
+ vsps = <&vspd0 &vspd1 &vspd2 &vspd3>;
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+ du_out_rgb: endpoint {
+ };
+ };
+ port@1 {
+ reg = <1>;
+ du_out_hdmi0: endpoint {
+ };
+ };
+ port@2 {
+ reg = <2>;
+ du_out_hdmi1: endpoint {
+ };
+ };
+ port@3 {
+ reg = <3>;
+ du_out_lvds0: endpoint {
+ };
+ };
+ };
+ };
};
};
--
2.7.0.rc3.207.g0ac5344
^ permalink raw reply related [flat|nested] 32+ messages in thread* [PATCH 11/30] arm64: dts: r8a7795: renesas: salvator-x: Enable DU
2016-09-08 7:43 [GIT PULL] Renesas ARM64 Based SoC DT Updates for v4.9 Simon Horman
` (9 preceding siblings ...)
2016-09-08 7:43 ` [PATCH 10/30] arm64: dts: renesas: r8a7795: Add DU device to DT Simon Horman
@ 2016-09-08 7:43 ` Simon Horman
2016-09-08 7:43 ` [PATCH 12/30] arm64: dts: r8a7795: Add SoC-specific compatible property to audio-dmac nodes Simon Horman
` (19 subsequent siblings)
30 siblings, 0 replies; 32+ messages in thread
From: Simon Horman @ 2016-09-08 7:43 UTC (permalink / raw)
To: linux-renesas-soc
Cc: linux-arm-kernel, Magnus Damm, Laurent Pinchart, Simon Horman
From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Only the VGA output is supported for now.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts | 44 ++++++++++++++++++++++
1 file changed, 44 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts b/arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts
index 4332ec7bb38c..64a29a87a724 100644
--- a/arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts
+++ b/arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts
@@ -146,6 +146,50 @@
sound-dai = <&ak4613>;
};
};
+
+ vga-encoder {
+ compatible = "adi,adv7123";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+ adv7123_in: endpoint {
+ remote-endpoint = <&du_out_rgb>;
+ };
+ };
+ port@1 {
+ reg = <1>;
+ adv7123_out: endpoint {
+ remote-endpoint = <&vga_in>;
+ };
+ };
+ };
+ };
+
+ vga {
+ compatible = "vga-connector";
+
+ port {
+ vga_in: endpoint {
+ remote-endpoint = <&adv7123_out>;
+ };
+ };
+ };
+};
+
+&du {
+ status = "okay";
+
+ ports {
+ port@0 {
+ endpoint {
+ remote-endpoint = <&adv7123_in>;
+ };
+ };
+ };
};
&extal_clk {
--
2.7.0.rc3.207.g0ac5344
^ permalink raw reply related [flat|nested] 32+ messages in thread* [PATCH 12/30] arm64: dts: r8a7795: Add SoC-specific compatible property to audio-dmac nodes
2016-09-08 7:43 [GIT PULL] Renesas ARM64 Based SoC DT Updates for v4.9 Simon Horman
` (10 preceding siblings ...)
2016-09-08 7:43 ` [PATCH 11/30] arm64: dts: r8a7795: renesas: salvator-x: Enable DU Simon Horman
@ 2016-09-08 7:43 ` Simon Horman
2016-09-08 7:43 ` [PATCH 13/30] arm64: dts: h3ulcb: add H3ULCB board DT bindings Simon Horman
` (18 subsequent siblings)
30 siblings, 0 replies; 32+ messages in thread
From: Simon Horman @ 2016-09-08 7:43 UTC (permalink / raw)
To: linux-renesas-soc
Cc: linux-arm-kernel, Magnus Damm, Geert Uytterhoeven, Simon Horman
From: Geert Uytterhoeven <geert+renesas@glider.be>
The audio-dmac nodes used the generic compatible property only.
Add the SoC-specific one, to make it future proof.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm64/boot/dts/renesas/r8a7795.dtsi | 6 ++++--
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/arch/arm64/boot/dts/renesas/r8a7795.dtsi b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
index 5d59e7fe7bbc..64899b556a0e 100644
--- a/arch/arm64/boot/dts/renesas/r8a7795.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
@@ -328,7 +328,8 @@
};
audma0: dma-controller@ec700000 {
- compatible = "renesas,rcar-dmac";
+ compatible = "renesas,dmac-r8a7795",
+ "renesas,rcar-dmac";
reg = <0 0xec700000 0 0x10000>;
interrupts = <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH
@@ -360,7 +361,8 @@
};
audma1: dma-controller@ec720000 {
- compatible = "renesas,rcar-dmac";
+ compatible = "renesas,dmac-r8a7795",
+ "renesas,rcar-dmac";
reg = <0 0xec720000 0 0x10000>;
interrupts = <GIC_SPI 351 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH
--
2.7.0.rc3.207.g0ac5344
^ permalink raw reply related [flat|nested] 32+ messages in thread* [PATCH 13/30] arm64: dts: h3ulcb: add H3ULCB board DT bindings
2016-09-08 7:43 [GIT PULL] Renesas ARM64 Based SoC DT Updates for v4.9 Simon Horman
` (11 preceding siblings ...)
2016-09-08 7:43 ` [PATCH 12/30] arm64: dts: r8a7795: Add SoC-specific compatible property to audio-dmac nodes Simon Horman
@ 2016-09-08 7:43 ` Simon Horman
2016-09-08 7:43 ` [PATCH 14/30] arm64: dts: h3ulcb: initial device tree Simon Horman
` (17 subsequent siblings)
30 siblings, 0 replies; 32+ messages in thread
From: Simon Horman @ 2016-09-08 7:43 UTC (permalink / raw)
To: linux-renesas-soc
Cc: linux-arm-kernel, Magnus Damm, Vladimir Barinov, Simon Horman
From: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Add H3ULCB Device tree bindings Documentation, listing it as a supported
board.
Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Acked-by: Rob Herring <robh@kernel.org>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
Documentation/devicetree/bindings/arm/shmobile.txt | 2 ++
1 file changed, 2 insertions(+)
diff --git a/Documentation/devicetree/bindings/arm/shmobile.txt b/Documentation/devicetree/bindings/arm/shmobile.txt
index 1df32d339da5..69e42466d9cc 100644
--- a/Documentation/devicetree/bindings/arm/shmobile.txt
+++ b/Documentation/devicetree/bindings/arm/shmobile.txt
@@ -49,6 +49,8 @@ Boards:
compatible = "renesas,genmai", "renesas,r7s72100"
- Gose
compatible = "renesas,gose", "renesas,r8a7793"
+ - H3ULCB (RTP0RC7795SKB00010S)
+ compatible = "renesas,h3ulcb", "renesas,r8a7795";
- Henninger
compatible = "renesas,henninger", "renesas,r8a7791"
- Koelsch (RTP0RC7791SEB00010S)
--
2.7.0.rc3.207.g0ac5344
^ permalink raw reply related [flat|nested] 32+ messages in thread* [PATCH 14/30] arm64: dts: h3ulcb: initial device tree
2016-09-08 7:43 [GIT PULL] Renesas ARM64 Based SoC DT Updates for v4.9 Simon Horman
` (12 preceding siblings ...)
2016-09-08 7:43 ` [PATCH 13/30] arm64: dts: h3ulcb: add H3ULCB board DT bindings Simon Horman
@ 2016-09-08 7:43 ` Simon Horman
2016-09-08 7:43 ` [PATCH 15/30] arm64: dts: h3ulcb: enable SCIF clk and pins Simon Horman
` (16 subsequent siblings)
30 siblings, 0 replies; 32+ messages in thread
From: Simon Horman @ 2016-09-08 7:43 UTC (permalink / raw)
To: linux-renesas-soc
Cc: linux-arm-kernel, Magnus Damm, Vladimir Barinov, Simon Horman
From: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Add the initial device tree for the R8A7795 SoC based H3ULCB low cost
board.
This commit supports the following peripherals:
- SCIF (console)
Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm64/boot/dts/renesas/Makefile | 2 +-
arch/arm64/boot/dts/renesas/r8a7795-h3ulcb.dts | 51 ++++++++++++++++++++++++++
2 files changed, 52 insertions(+), 1 deletion(-)
create mode 100644 arch/arm64/boot/dts/renesas/r8a7795-h3ulcb.dts
diff --git a/arch/arm64/boot/dts/renesas/Makefile b/arch/arm64/boot/dts/renesas/Makefile
index 17139f7003a6..eb72830ec9eb 100644
--- a/arch/arm64/boot/dts/renesas/Makefile
+++ b/arch/arm64/boot/dts/renesas/Makefile
@@ -1,4 +1,4 @@
-dtb-$(CONFIG_ARCH_R8A7795) += r8a7795-salvator-x.dtb
+dtb-$(CONFIG_ARCH_R8A7795) += r8a7795-salvator-x.dtb r8a7795-h3ulcb.dtb
dtb-$(CONFIG_ARCH_R8A7796) += r8a7796-salvator-x.dtb
always := $(dtb-y)
diff --git a/arch/arm64/boot/dts/renesas/r8a7795-h3ulcb.dts b/arch/arm64/boot/dts/renesas/r8a7795-h3ulcb.dts
new file mode 100644
index 000000000000..ecb9e1102266
--- /dev/null
+++ b/arch/arm64/boot/dts/renesas/r8a7795-h3ulcb.dts
@@ -0,0 +1,51 @@
+/*
+ * Device Tree Source for the H3ULCB board
+ *
+ * Copyright (C) 2016 Renesas Electronics Corp.
+ * Copyright (C) 2016 Cogent Embedded, Inc.
+ *
+ * This file is licensed under the terms of the GNU General Public License
+ * version 2. This program is licensed "as is" without any warranty of any
+ * kind, whether express or implied.
+ */
+
+/dts-v1/;
+#include "r8a7795.dtsi"
+#include <dt-bindings/gpio/gpio.h>
+
+/ {
+ model = "Renesas H3ULCB board based on r8a7795";
+ compatible = "renesas,h3ulcb", "renesas,r8a7795";
+
+ aliases {
+ serial0 = &scif2;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
+ memory@48000000 {
+ device_type = "memory";
+ /* first 128MB is reserved for secure area. */
+ reg = <0x0 0x48000000 0x0 0x38000000>;
+ };
+};
+
+&extal_clk {
+ clock-frequency = <16666666>;
+};
+
+&pfc {
+ scif2_pins: scif2 {
+ groups = "scif2_data_a";
+ function = "scif2";
+ };
+};
+
+&scif2 {
+ pinctrl-0 = <&scif2_pins>;
+ pinctrl-names = "default";
+
+ status = "okay";
+};
--
2.7.0.rc3.207.g0ac5344
^ permalink raw reply related [flat|nested] 32+ messages in thread* [PATCH 15/30] arm64: dts: h3ulcb: enable SCIF clk and pins
2016-09-08 7:43 [GIT PULL] Renesas ARM64 Based SoC DT Updates for v4.9 Simon Horman
` (13 preceding siblings ...)
2016-09-08 7:43 ` [PATCH 14/30] arm64: dts: h3ulcb: initial device tree Simon Horman
@ 2016-09-08 7:43 ` Simon Horman
2016-09-08 7:43 ` [PATCH 16/30] arm64: dts: h3ulcb: enable EthernetAVB Simon Horman
` (15 subsequent siblings)
30 siblings, 0 replies; 32+ messages in thread
From: Simon Horman @ 2016-09-08 7:43 UTC (permalink / raw)
To: linux-renesas-soc
Cc: linux-arm-kernel, Magnus Damm, Vladimir Barinov, Simon Horman
From: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
This enables the external crystal for the SCIF_CLK and its pinctrl, to
be used by the Baud Rate Generator for External Clock (BRG) on (H)SCIF.
Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm64/boot/dts/renesas/r8a7795-h3ulcb.dts | 13 +++++++++++++
1 file changed, 13 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/r8a7795-h3ulcb.dts b/arch/arm64/boot/dts/renesas/r8a7795-h3ulcb.dts
index ecb9e1102266..67ce368ff9ee 100644
--- a/arch/arm64/boot/dts/renesas/r8a7795-h3ulcb.dts
+++ b/arch/arm64/boot/dts/renesas/r8a7795-h3ulcb.dts
@@ -37,10 +37,18 @@
};
&pfc {
+ pinctrl-0 = <&scif_clk_pins>;
+ pinctrl-names = "default";
+
scif2_pins: scif2 {
groups = "scif2_data_a";
function = "scif2";
};
+
+ scif_clk_pins: scif_clk {
+ groups = "scif_clk_a";
+ function = "scif_clk";
+ };
};
&scif2 {
@@ -49,3 +57,8 @@
status = "okay";
};
+
+&scif_clk {
+ clock-frequency = <14745600>;
+ status = "okay";
+};
--
2.7.0.rc3.207.g0ac5344
^ permalink raw reply related [flat|nested] 32+ messages in thread* [PATCH 16/30] arm64: dts: h3ulcb: enable EthernetAVB
2016-09-08 7:43 [GIT PULL] Renesas ARM64 Based SoC DT Updates for v4.9 Simon Horman
` (14 preceding siblings ...)
2016-09-08 7:43 ` [PATCH 15/30] arm64: dts: h3ulcb: enable SCIF clk and pins Simon Horman
@ 2016-09-08 7:43 ` Simon Horman
2016-09-08 7:43 ` [PATCH 17/30] arm64: dts: h3ulcb: enable I2C2 Simon Horman
` (14 subsequent siblings)
30 siblings, 0 replies; 32+ messages in thread
From: Simon Horman @ 2016-09-08 7:43 UTC (permalink / raw)
To: linux-renesas-soc
Cc: linux-arm-kernel, Magnus Damm, Vladimir Barinov, Simon Horman
From: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
This supports Ethernet AVB on H3ULCB board
Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm64/boot/dts/renesas/r8a7795-h3ulcb.dts | 32 ++++++++++++++++++++++++++
1 file changed, 32 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/r8a7795-h3ulcb.dts b/arch/arm64/boot/dts/renesas/r8a7795-h3ulcb.dts
index 67ce368ff9ee..fb694b8c6f59 100644
--- a/arch/arm64/boot/dts/renesas/r8a7795-h3ulcb.dts
+++ b/arch/arm64/boot/dts/renesas/r8a7795-h3ulcb.dts
@@ -19,6 +19,7 @@
aliases {
serial0 = &scif2;
+ ethernet0 = &avb;
};
chosen {
@@ -49,6 +50,11 @@
groups = "scif_clk_a";
function = "scif_clk";
};
+
+ avb_pins: avb {
+ groups = "avb_mdc";
+ function = "avb";
+ };
};
&scif2 {
@@ -62,3 +68,29 @@
clock-frequency = <14745600>;
status = "okay";
};
+
+&avb {
+ pinctrl-0 = <&avb_pins>;
+ pinctrl-names = "default";
+ renesas,no-ether-link;
+ phy-handle = <&phy0>;
+ status = "okay";
+
+ phy0: ethernet-phy@0 {
+ rxc-skew-ps = <900>;
+ rxdv-skew-ps = <0>;
+ rxd0-skew-ps = <0>;
+ rxd1-skew-ps = <0>;
+ rxd2-skew-ps = <0>;
+ rxd3-skew-ps = <0>;
+ txc-skew-ps = <900>;
+ txen-skew-ps = <0>;
+ txd0-skew-ps = <0>;
+ txd1-skew-ps = <0>;
+ txd2-skew-ps = <0>;
+ txd3-skew-ps = <0>;
+ reg = <0>;
+ interrupt-parent = <&gpio2>;
+ interrupts = <11 IRQ_TYPE_LEVEL_LOW>;
+ };
+};
--
2.7.0.rc3.207.g0ac5344
^ permalink raw reply related [flat|nested] 32+ messages in thread* [PATCH 17/30] arm64: dts: h3ulcb: enable I2C2
2016-09-08 7:43 [GIT PULL] Renesas ARM64 Based SoC DT Updates for v4.9 Simon Horman
` (15 preceding siblings ...)
2016-09-08 7:43 ` [PATCH 16/30] arm64: dts: h3ulcb: enable EthernetAVB Simon Horman
@ 2016-09-08 7:43 ` Simon Horman
2016-09-08 7:43 ` [PATCH 18/30] arm64: dts: h3ulcb: enable EXTALR clk Simon Horman
` (13 subsequent siblings)
30 siblings, 0 replies; 32+ messages in thread
From: Simon Horman @ 2016-09-08 7:43 UTC (permalink / raw)
To: linux-renesas-soc
Cc: linux-arm-kernel, Magnus Damm, Vladimir Barinov, Simon Horman
From: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
This supports I2C2 bus on H3ULCB board
Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm64/boot/dts/renesas/r8a7795-h3ulcb.dts | 12 ++++++++++++
1 file changed, 12 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/r8a7795-h3ulcb.dts b/arch/arm64/boot/dts/renesas/r8a7795-h3ulcb.dts
index fb694b8c6f59..3ba1f72526ba 100644
--- a/arch/arm64/boot/dts/renesas/r8a7795-h3ulcb.dts
+++ b/arch/arm64/boot/dts/renesas/r8a7795-h3ulcb.dts
@@ -51,6 +51,11 @@
function = "scif_clk";
};
+ i2c2_pins: i2c2 {
+ groups = "i2c2_a";
+ function = "i2c2";
+ };
+
avb_pins: avb {
groups = "avb_mdc";
function = "avb";
@@ -69,6 +74,13 @@
status = "okay";
};
+&i2c2 {
+ pinctrl-0 = <&i2c2_pins>;
+ pinctrl-names = "default";
+
+ status = "okay";
+};
+
&avb {
pinctrl-0 = <&avb_pins>;
pinctrl-names = "default";
--
2.7.0.rc3.207.g0ac5344
^ permalink raw reply related [flat|nested] 32+ messages in thread* [PATCH 18/30] arm64: dts: h3ulcb: enable EXTALR clk
2016-09-08 7:43 [GIT PULL] Renesas ARM64 Based SoC DT Updates for v4.9 Simon Horman
` (16 preceding siblings ...)
2016-09-08 7:43 ` [PATCH 17/30] arm64: dts: h3ulcb: enable I2C2 Simon Horman
@ 2016-09-08 7:43 ` Simon Horman
2016-09-08 7:43 ` [PATCH 19/30] arm64: dts: h3ulcb: enable WDT Simon Horman
` (12 subsequent siblings)
30 siblings, 0 replies; 32+ messages in thread
From: Simon Horman @ 2016-09-08 7:43 UTC (permalink / raw)
To: linux-renesas-soc
Cc: linux-arm-kernel, Magnus Damm, Vladimir Barinov, Simon Horman
From: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
This enables EXTALR clock that can be used for the watchdog.
Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm64/boot/dts/renesas/r8a7795-h3ulcb.dts | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/r8a7795-h3ulcb.dts b/arch/arm64/boot/dts/renesas/r8a7795-h3ulcb.dts
index 3ba1f72526ba..42a4208f57ed 100644
--- a/arch/arm64/boot/dts/renesas/r8a7795-h3ulcb.dts
+++ b/arch/arm64/boot/dts/renesas/r8a7795-h3ulcb.dts
@@ -37,6 +37,10 @@
clock-frequency = <16666666>;
};
+&extalr_clk {
+ clock-frequency = <32768>;
+};
+
&pfc {
pinctrl-0 = <&scif_clk_pins>;
pinctrl-names = "default";
--
2.7.0.rc3.207.g0ac5344
^ permalink raw reply related [flat|nested] 32+ messages in thread* [PATCH 19/30] arm64: dts: h3ulcb: enable WDT
2016-09-08 7:43 [GIT PULL] Renesas ARM64 Based SoC DT Updates for v4.9 Simon Horman
` (17 preceding siblings ...)
2016-09-08 7:43 ` [PATCH 18/30] arm64: dts: h3ulcb: enable EXTALR clk Simon Horman
@ 2016-09-08 7:43 ` Simon Horman
2016-09-08 7:43 ` [PATCH 20/30] arm64: dts: h3ulcb: enable USB2 PHY of channel 1 Simon Horman
` (11 subsequent siblings)
30 siblings, 0 replies; 32+ messages in thread
From: Simon Horman @ 2016-09-08 7:43 UTC (permalink / raw)
To: linux-renesas-soc
Cc: linux-arm-kernel, Magnus Damm, Vladimir Barinov, Simon Horman
From: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
This supports watchdog timer for H3ULCB board
Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm64/boot/dts/renesas/r8a7795-h3ulcb.dts | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/r8a7795-h3ulcb.dts b/arch/arm64/boot/dts/renesas/r8a7795-h3ulcb.dts
index 42a4208f57ed..ce95a3346102 100644
--- a/arch/arm64/boot/dts/renesas/r8a7795-h3ulcb.dts
+++ b/arch/arm64/boot/dts/renesas/r8a7795-h3ulcb.dts
@@ -85,6 +85,11 @@
status = "okay";
};
+&wdt0 {
+ timeout-sec = <60>;
+ status = "okay";
+};
+
&avb {
pinctrl-0 = <&avb_pins>;
pinctrl-names = "default";
--
2.7.0.rc3.207.g0ac5344
^ permalink raw reply related [flat|nested] 32+ messages in thread* [PATCH 20/30] arm64: dts: h3ulcb: enable USB2 PHY of channel 1
2016-09-08 7:43 [GIT PULL] Renesas ARM64 Based SoC DT Updates for v4.9 Simon Horman
` (18 preceding siblings ...)
2016-09-08 7:43 ` [PATCH 19/30] arm64: dts: h3ulcb: enable WDT Simon Horman
@ 2016-09-08 7:43 ` Simon Horman
2016-09-08 7:43 ` [PATCH 21/30] arm64: dts: h3ulcb: enable USB2.0 Host " Simon Horman
` (10 subsequent siblings)
30 siblings, 0 replies; 32+ messages in thread
From: Simon Horman @ 2016-09-08 7:43 UTC (permalink / raw)
To: linux-renesas-soc
Cc: linux-arm-kernel, Magnus Damm, Vladimir Barinov, Simon Horman
From: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
This supports USB2 PHY channel #1 on H3ULCB board
Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm64/boot/dts/renesas/r8a7795-h3ulcb.dts | 12 ++++++++++++
1 file changed, 12 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/r8a7795-h3ulcb.dts b/arch/arm64/boot/dts/renesas/r8a7795-h3ulcb.dts
index ce95a3346102..c7ce96f90722 100644
--- a/arch/arm64/boot/dts/renesas/r8a7795-h3ulcb.dts
+++ b/arch/arm64/boot/dts/renesas/r8a7795-h3ulcb.dts
@@ -64,6 +64,11 @@
groups = "avb_mdc";
function = "avb";
};
+
+ usb1_pins: usb1 {
+ groups = "usb1";
+ function = "usb1";
+ };
};
&scif2 {
@@ -115,3 +120,10 @@
interrupts = <11 IRQ_TYPE_LEVEL_LOW>;
};
};
+
+&usb2_phy1 {
+ pinctrl-0 = <&usb1_pins>;
+ pinctrl-names = "default";
+
+ status = "okay";
+};
--
2.7.0.rc3.207.g0ac5344
^ permalink raw reply related [flat|nested] 32+ messages in thread* [PATCH 21/30] arm64: dts: h3ulcb: enable USB2.0 Host channel 1
2016-09-08 7:43 [GIT PULL] Renesas ARM64 Based SoC DT Updates for v4.9 Simon Horman
` (19 preceding siblings ...)
2016-09-08 7:43 ` [PATCH 20/30] arm64: dts: h3ulcb: enable USB2 PHY of channel 1 Simon Horman
@ 2016-09-08 7:43 ` Simon Horman
2016-09-08 7:43 ` [PATCH 22/30] arm64: dts: r8a7795: remove unnecessary cap-mmc-highspeed property Simon Horman
` (9 subsequent siblings)
30 siblings, 0 replies; 32+ messages in thread
From: Simon Horman @ 2016-09-08 7:43 UTC (permalink / raw)
To: linux-renesas-soc
Cc: linux-arm-kernel, Magnus Damm, Vladimir Barinov, Simon Horman
From: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
This supports USB2.0 Host channel 1 on H3ULCB board
Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm64/boot/dts/renesas/r8a7795-h3ulcb.dts | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/r8a7795-h3ulcb.dts b/arch/arm64/boot/dts/renesas/r8a7795-h3ulcb.dts
index c7ce96f90722..234b66a9e163 100644
--- a/arch/arm64/boot/dts/renesas/r8a7795-h3ulcb.dts
+++ b/arch/arm64/boot/dts/renesas/r8a7795-h3ulcb.dts
@@ -127,3 +127,11 @@
status = "okay";
};
+
+&ehci1 {
+ status = "okay";
+};
+
+&ohci1 {
+ status = "okay";
+};
--
2.7.0.rc3.207.g0ac5344
^ permalink raw reply related [flat|nested] 32+ messages in thread* [PATCH 22/30] arm64: dts: r8a7795: remove unnecessary cap-mmc-highspeed property
2016-09-08 7:43 [GIT PULL] Renesas ARM64 Based SoC DT Updates for v4.9 Simon Horman
` (20 preceding siblings ...)
2016-09-08 7:43 ` [PATCH 21/30] arm64: dts: h3ulcb: enable USB2.0 Host " Simon Horman
@ 2016-09-08 7:43 ` Simon Horman
2016-09-08 7:43 ` [PATCH 23/30] arm64: dts: h3ulcb: enable GPIO keys Simon Horman
` (8 subsequent siblings)
30 siblings, 0 replies; 32+ messages in thread
From: Simon Horman @ 2016-09-08 7:43 UTC (permalink / raw)
To: linux-renesas-soc; +Cc: linux-arm-kernel, Magnus Damm, Simon Horman
Remove cap-mmc-highspeed property from SDHI2 and SDHI3.
This property is unnecessary as the driver automatically sets
the highspeed capability. Furthermore its use is inconsistent with SDHI0
and SDHI1 which are also highspeed capable but do not have this property
present.
Found by inspection.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm64/boot/dts/renesas/r8a7795.dtsi | 2 --
1 file changed, 2 deletions(-)
diff --git a/arch/arm64/boot/dts/renesas/r8a7795.dtsi b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
index 64899b556a0e..8c15040f2540 100644
--- a/arch/arm64/boot/dts/renesas/r8a7795.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
@@ -1122,7 +1122,6 @@
clocks = <&cpg CPG_MOD 312>;
max-frequency = <200000000>;
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
- cap-mmc-highspeed;
status = "disabled";
};
@@ -1133,7 +1132,6 @@
clocks = <&cpg CPG_MOD 311>;
max-frequency = <200000000>;
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
- cap-mmc-highspeed;
status = "disabled";
};
--
2.7.0.rc3.207.g0ac5344
^ permalink raw reply related [flat|nested] 32+ messages in thread* [PATCH 23/30] arm64: dts: h3ulcb: enable GPIO keys
2016-09-08 7:43 [GIT PULL] Renesas ARM64 Based SoC DT Updates for v4.9 Simon Horman
` (21 preceding siblings ...)
2016-09-08 7:43 ` [PATCH 22/30] arm64: dts: r8a7795: remove unnecessary cap-mmc-highspeed property Simon Horman
@ 2016-09-08 7:43 ` Simon Horman
2016-09-08 7:43 ` [PATCH 24/30] arm64: dts: h3ulcb: enable SDHI0 Simon Horman
` (7 subsequent siblings)
30 siblings, 0 replies; 32+ messages in thread
From: Simon Horman @ 2016-09-08 7:43 UTC (permalink / raw)
To: linux-renesas-soc
Cc: linux-arm-kernel, Magnus Damm, Vladimir Barinov, Simon Horman
From: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
This supports GPIO keys on H3ULCB board
Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm64/boot/dts/renesas/r8a7795-h3ulcb.dts | 13 +++++++++++++
1 file changed, 13 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/r8a7795-h3ulcb.dts b/arch/arm64/boot/dts/renesas/r8a7795-h3ulcb.dts
index 234b66a9e163..adf2b0e44dac 100644
--- a/arch/arm64/boot/dts/renesas/r8a7795-h3ulcb.dts
+++ b/arch/arm64/boot/dts/renesas/r8a7795-h3ulcb.dts
@@ -12,6 +12,7 @@
/dts-v1/;
#include "r8a7795.dtsi"
#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
/ {
model = "Renesas H3ULCB board based on r8a7795";
@@ -31,6 +32,18 @@
/* first 128MB is reserved for secure area. */
reg = <0x0 0x48000000 0x0 0x38000000>;
};
+
+ keyboard {
+ compatible = "gpio-keys";
+
+ key-1 {
+ linux,code = <KEY_1>;
+ label = "SW3";
+ wakeup-source;
+ debounce-interval = <20>;
+ gpios = <&gpio6 11 GPIO_ACTIVE_LOW>;
+ };
+ };
};
&extal_clk {
--
2.7.0.rc3.207.g0ac5344
^ permalink raw reply related [flat|nested] 32+ messages in thread* [PATCH 24/30] arm64: dts: h3ulcb: enable SDHI0
2016-09-08 7:43 [GIT PULL] Renesas ARM64 Based SoC DT Updates for v4.9 Simon Horman
` (22 preceding siblings ...)
2016-09-08 7:43 ` [PATCH 23/30] arm64: dts: h3ulcb: enable GPIO keys Simon Horman
@ 2016-09-08 7:43 ` Simon Horman
2016-09-08 7:43 ` [PATCH 25/30] arm64: dts: h3ulcb: Sound SSI support Simon Horman
` (6 subsequent siblings)
30 siblings, 0 replies; 32+ messages in thread
From: Simon Horman @ 2016-09-08 7:43 UTC (permalink / raw)
To: linux-renesas-soc
Cc: linux-arm-kernel, Magnus Damm, Vladimir Barinov, Simon Horman
From: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
This supports SDHI0 on H3ULCB board SD card slot
Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm64/boot/dts/renesas/r8a7795-h3ulcb.dts | 49 ++++++++++++++++++++++++++
1 file changed, 49 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/r8a7795-h3ulcb.dts b/arch/arm64/boot/dts/renesas/r8a7795-h3ulcb.dts
index adf2b0e44dac..44f1184e1a14 100644
--- a/arch/arm64/boot/dts/renesas/r8a7795-h3ulcb.dts
+++ b/arch/arm64/boot/dts/renesas/r8a7795-h3ulcb.dts
@@ -44,6 +44,30 @@
gpios = <&gpio6 11 GPIO_ACTIVE_LOW>;
};
};
+
+ vcc_sdhi0: regulator-vcc-sdhi0 {
+ compatible = "regulator-fixed";
+
+ regulator-name = "SDHI0 Vcc";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+
+ gpio = <&gpio5 2 GPIO_ACTIVE_HIGH>;
+ enable-active-high;
+ };
+
+ vccq_sdhi0: regulator-vccq-sdhi0 {
+ compatible = "regulator-gpio";
+
+ regulator-name = "SDHI0 VccQ";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <3300000>;
+
+ gpios = <&gpio5 1 GPIO_ACTIVE_HIGH>;
+ gpios-states = <1>;
+ states = <3300000 1
+ 1800000 0>;
+ };
};
&extal_clk {
@@ -78,6 +102,18 @@
function = "avb";
};
+ sdhi0_pins_3v3: sd0_3v3 {
+ groups = "sdhi0_data4", "sdhi0_ctrl";
+ function = "sdhi0";
+ power-source = <3300>;
+ };
+
+ sdhi0_pins_1v8: sd0_1v8 {
+ groups = "sdhi0_data4", "sdhi0_ctrl";
+ function = "sdhi0";
+ power-source = <1800>;
+ };
+
usb1_pins: usb1 {
groups = "usb1";
function = "usb1";
@@ -103,6 +139,19 @@
status = "okay";
};
+&sdhi0 {
+ pinctrl-0 = <&sdhi0_pins_3v3>;
+ pinctrl-1 = <&sdhi0_pins_1v8>;
+ pinctrl-names = "default", "state_uhs";
+
+ vmmc-supply = <&vcc_sdhi0>;
+ vqmmc-supply = <&vccq_sdhi0>;
+ cd-gpios = <&gpio3 12 GPIO_ACTIVE_LOW>;
+ bus-width = <4>;
+ sd-uhs-sdr50;
+ status = "okay";
+};
+
&wdt0 {
timeout-sec = <60>;
status = "okay";
--
2.7.0.rc3.207.g0ac5344
^ permalink raw reply related [flat|nested] 32+ messages in thread* [PATCH 25/30] arm64: dts: h3ulcb: Sound SSI support
2016-09-08 7:43 [GIT PULL] Renesas ARM64 Based SoC DT Updates for v4.9 Simon Horman
` (23 preceding siblings ...)
2016-09-08 7:43 ` [PATCH 24/30] arm64: dts: h3ulcb: enable SDHI0 Simon Horman
@ 2016-09-08 7:43 ` Simon Horman
2016-09-08 7:43 ` [PATCH 26/30] arm64: dts: h3ulcb: enable GPIO leds Simon Horman
` (5 subsequent siblings)
30 siblings, 0 replies; 32+ messages in thread
From: Simon Horman @ 2016-09-08 7:43 UTC (permalink / raw)
To: linux-renesas-soc
Cc: linux-arm-kernel, Magnus Damm, Vladimir Barinov, Simon Horman
From: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
This supports SSI sound for H3ULCB board.
SSI DMA mode used. CS2000 used as AUDIO_CLK_B.
Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm64/boot/dts/renesas/r8a7795-h3ulcb.dts | 118 +++++++++++++++++++++++++
1 file changed, 118 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/r8a7795-h3ulcb.dts b/arch/arm64/boot/dts/renesas/r8a7795-h3ulcb.dts
index 44f1184e1a14..c6d4ee336740 100644
--- a/arch/arm64/boot/dts/renesas/r8a7795-h3ulcb.dts
+++ b/arch/arm64/boot/dts/renesas/r8a7795-h3ulcb.dts
@@ -45,6 +45,12 @@
};
};
+ x12_clk: x12 {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <24576000>;
+ };
+
vcc_sdhi0: regulator-vcc-sdhi0 {
compatible = "regulator-fixed";
@@ -68,6 +74,32 @@
states = <3300000 1
1800000 0>;
};
+
+ audio_clkout: audio-clkout {
+ /*
+ * This is same as <&rcar_sound 0>
+ * but needed to avoid cs2000/rcar_sound probe dead-lock
+ */
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <11289600>;
+ };
+
+ rsnd_ak4613: sound {
+ compatible = "simple-audio-card";
+
+ simple-audio-card,format = "left_j";
+ simple-audio-card,bitclock-master = <&sndcpu>;
+ simple-audio-card,frame-master = <&sndcpu>;
+
+ sndcpu: simple-audio-card,cpu {
+ sound-dai = <&rcar_sound>;
+ };
+
+ sndcodec: simple-audio-card,codec {
+ sound-dai = <&ak4613>;
+ };
+ };
};
&extal_clk {
@@ -114,6 +146,17 @@
power-source = <1800>;
};
+ sound_pins: sound {
+ groups = "ssi01239_ctrl", "ssi0_data", "ssi1_data_a";
+ function = "ssi";
+ };
+
+ sound_clk_pins: sound-clk {
+ groups = "audio_clk_a_a", "audio_clk_b_a", "audio_clk_c_a",
+ "audio_clkout_a", "audio_clkout3_a";
+ function = "audio_clk";
+ };
+
usb1_pins: usb1 {
groups = "usb1";
function = "usb1";
@@ -137,6 +180,73 @@
pinctrl-names = "default";
status = "okay";
+
+ clock-frequency = <100000>;
+
+ ak4613: codec@10 {
+ compatible = "asahi-kasei,ak4613";
+ #sound-dai-cells = <0>;
+ reg = <0x10>;
+ clocks = <&rcar_sound 3>;
+
+ asahi-kasei,in1-single-end;
+ asahi-kasei,in2-single-end;
+ asahi-kasei,out1-single-end;
+ asahi-kasei,out2-single-end;
+ asahi-kasei,out3-single-end;
+ asahi-kasei,out4-single-end;
+ asahi-kasei,out5-single-end;
+ asahi-kasei,out6-single-end;
+ };
+
+ cs2000: clk-multiplier@4f {
+ #clock-cells = <0>;
+ compatible = "cirrus,cs2000-cp";
+ reg = <0x4f>;
+ clocks = <&audio_clkout>, <&x12_clk>;
+ clock-names = "clk_in", "ref_clk";
+
+ assigned-clocks = <&cs2000>;
+ assigned-clock-rates = <24576000>; /* 1/1 divide */
+ };
+};
+
+&rcar_sound {
+ pinctrl-0 = <&sound_pins &sound_clk_pins>;
+ pinctrl-names = "default";
+
+ /* Single DAI */
+ #sound-dai-cells = <0>;
+
+ /* audio_clkout0/1/2/3 */
+ #clock-cells = <1>;
+ clock-frequency = <11289600>;
+
+ status = "okay";
+
+ /* update <audio_clk_b> to <cs2000> */
+ clocks = <&cpg CPG_MOD 1005>,
+ <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
+ <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
+ <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
+ <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
+ <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
+ <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
+ <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
+ <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
+ <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
+ <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
+ <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
+ <&audio_clk_a>, <&cs2000>,
+ <&audio_clk_c>,
+ <&cpg CPG_CORE R8A7795_CLK_S0D4>;
+
+ rcar_sound,dai {
+ dai0 {
+ playback = <&ssi0 &src0 &dvc0>;
+ capture = <&ssi1 &src1 &dvc1>;
+ };
+ };
};
&sdhi0 {
@@ -152,11 +262,19 @@
status = "okay";
};
+&ssi1 {
+ shared-pin;
+};
+
&wdt0 {
timeout-sec = <60>;
status = "okay";
};
+&audio_clk_a {
+ clock-frequency = <22579200>;
+};
+
&avb {
pinctrl-0 = <&avb_pins>;
pinctrl-names = "default";
--
2.7.0.rc3.207.g0ac5344
^ permalink raw reply related [flat|nested] 32+ messages in thread* [PATCH 26/30] arm64: dts: h3ulcb: enable GPIO leds
2016-09-08 7:43 [GIT PULL] Renesas ARM64 Based SoC DT Updates for v4.9 Simon Horman
` (24 preceding siblings ...)
2016-09-08 7:43 ` [PATCH 25/30] arm64: dts: h3ulcb: Sound SSI support Simon Horman
@ 2016-09-08 7:43 ` Simon Horman
2016-09-08 7:43 ` [PATCH 27/30] arm64: dts: r8a7795: salvator-x: Configure pins for the DU RGB output Simon Horman
` (4 subsequent siblings)
30 siblings, 0 replies; 32+ messages in thread
From: Simon Horman @ 2016-09-08 7:43 UTC (permalink / raw)
To: linux-renesas-soc
Cc: linux-arm-kernel, Magnus Damm, Vladimir Barinov, Simon Horman
From: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
This supports GPIO leds on H3ULCB board
Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm64/boot/dts/renesas/r8a7795-h3ulcb.dts | 11 +++++++++++
1 file changed, 11 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/r8a7795-h3ulcb.dts b/arch/arm64/boot/dts/renesas/r8a7795-h3ulcb.dts
index c6d4ee336740..bcb11a868343 100644
--- a/arch/arm64/boot/dts/renesas/r8a7795-h3ulcb.dts
+++ b/arch/arm64/boot/dts/renesas/r8a7795-h3ulcb.dts
@@ -33,6 +33,17 @@
reg = <0x0 0x48000000 0x0 0x38000000>;
};
+ leds {
+ compatible = "gpio-leds";
+
+ led5 {
+ gpios = <&gpio6 12 GPIO_ACTIVE_HIGH>;
+ };
+ led6 {
+ gpios = <&gpio6 13 GPIO_ACTIVE_HIGH>;
+ };
+ };
+
keyboard {
compatible = "gpio-keys";
--
2.7.0.rc3.207.g0ac5344
^ permalink raw reply related [flat|nested] 32+ messages in thread* [PATCH 27/30] arm64: dts: r8a7795: salvator-x: Configure pins for the DU RGB output
2016-09-08 7:43 [GIT PULL] Renesas ARM64 Based SoC DT Updates for v4.9 Simon Horman
` (25 preceding siblings ...)
2016-09-08 7:43 ` [PATCH 26/30] arm64: dts: h3ulcb: enable GPIO leds Simon Horman
@ 2016-09-08 7:43 ` Simon Horman
2016-09-08 7:43 ` [PATCH 28/30] arm64: dts: r8a7796: Add pinctrl device node Simon Horman
` (3 subsequent siblings)
30 siblings, 0 replies; 32+ messages in thread
From: Simon Horman @ 2016-09-08 7:43 UTC (permalink / raw)
To: linux-renesas-soc
Cc: linux-arm-kernel, Magnus Damm, Laurent Pinchart, Simon Horman
From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts | 7 +++++++
1 file changed, 7 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts b/arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts
index 64a29a87a724..b1eab6876f8c 100644
--- a/arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts
+++ b/arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts
@@ -181,6 +181,8 @@
};
&du {
+ pinctrl-0 = <&du_pins>;
+ pinctrl-names = "default";
status = "okay";
ports {
@@ -227,6 +229,11 @@
function = "avb";
};
+ du_pins: du {
+ groups = "du_rgb888", "du_sync", "du_oddf", "du_clk_out_0";
+ function = "du";
+ };
+
sdhi0_pins: sd0 {
groups = "sdhi0_data4", "sdhi0_ctrl";
function = "sdhi0";
--
2.7.0.rc3.207.g0ac5344
^ permalink raw reply related [flat|nested] 32+ messages in thread* [PATCH 28/30] arm64: dts: r8a7796: Add pinctrl device node
2016-09-08 7:43 [GIT PULL] Renesas ARM64 Based SoC DT Updates for v4.9 Simon Horman
` (26 preceding siblings ...)
2016-09-08 7:43 ` [PATCH 27/30] arm64: dts: r8a7795: salvator-x: Configure pins for the DU RGB output Simon Horman
@ 2016-09-08 7:43 ` Simon Horman
2016-09-08 7:43 ` [PATCH 29/30] arm64: dts: r8a7796: salvator-x: add serial console pins Simon Horman
` (2 subsequent siblings)
30 siblings, 0 replies; 32+ messages in thread
From: Simon Horman @ 2016-09-08 7:43 UTC (permalink / raw)
To: linux-renesas-soc
Cc: linux-arm-kernel, Magnus Damm, Takeshi Kihara, Simon Horman
From: Takeshi Kihara <takeshi.kihara.df@renesas.com>
This patch adds pinctrl device node for R8A7796 SoC.
Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm64/boot/dts/renesas/r8a7796.dtsi | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/r8a7796.dtsi b/arch/arm64/boot/dts/renesas/r8a7796.dtsi
index 1edf82440d78..91abc0732bdf 100644
--- a/arch/arm64/boot/dts/renesas/r8a7796.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a7796.dtsi
@@ -107,6 +107,11 @@
status = "disabled";
};
+ pfc: pin-controller@e6060000 {
+ compatible = "renesas,pfc-r8a7796";
+ reg = <0 0xe6060000 0 0x50c>;
+ };
+
cpg: clock-controller@e6150000 {
compatible = "renesas,r8a7796-cpg-mssr";
reg = <0 0xe6150000 0 0x1000>;
--
2.7.0.rc3.207.g0ac5344
^ permalink raw reply related [flat|nested] 32+ messages in thread* [PATCH 29/30] arm64: dts: r8a7796: salvator-x: add serial console pins
2016-09-08 7:43 [GIT PULL] Renesas ARM64 Based SoC DT Updates for v4.9 Simon Horman
` (27 preceding siblings ...)
2016-09-08 7:43 ` [PATCH 28/30] arm64: dts: r8a7796: Add pinctrl device node Simon Horman
@ 2016-09-08 7:43 ` Simon Horman
2016-09-08 7:43 ` [PATCH 30/30] arm64: dts: r8a7796: Add GPIO device nodes Simon Horman
2016-09-14 15:43 ` [GIT PULL] Renesas ARM64 Based SoC DT Updates for v4.9 Arnd Bergmann
30 siblings, 0 replies; 32+ messages in thread
From: Simon Horman @ 2016-09-08 7:43 UTC (permalink / raw)
To: linux-renesas-soc
Cc: linux-arm-kernel, Magnus Damm, Ulrich Hecht, Simon Horman
From: Ulrich Hecht <ulrich.hecht+renesas@gmail.com>
Adds pin control for SCIF2.
Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm64/boot/dts/renesas/r8a7796-salvator-x.dts | 16 ++++++++++++++++
1 file changed, 16 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/r8a7796-salvator-x.dts b/arch/arm64/boot/dts/renesas/r8a7796-salvator-x.dts
index e72be3856d79..13db7d61c26c 100644
--- a/arch/arm64/boot/dts/renesas/r8a7796-salvator-x.dts
+++ b/arch/arm64/boot/dts/renesas/r8a7796-salvator-x.dts
@@ -31,11 +31,27 @@
};
};
+&pfc {
+ pinctrl-0 = <&scif_clk_pins>;
+ pinctrl-names = "default";
+
+ scif2_pins: scif2 {
+ groups = "scif2_data_a";
+ function = "scif2";
+ };
+ scif_clk_pins: scif_clk {
+ groups = "scif_clk_a";
+ function = "scif_clk";
+ };
+};
+
&extal_clk {
clock-frequency = <16666666>;
};
&scif2 {
+ pinctrl-0 = <&scif2_pins>;
+ pinctrl-names = "default";
status = "okay";
};
--
2.7.0.rc3.207.g0ac5344
^ permalink raw reply related [flat|nested] 32+ messages in thread* [PATCH 30/30] arm64: dts: r8a7796: Add GPIO device nodes
2016-09-08 7:43 [GIT PULL] Renesas ARM64 Based SoC DT Updates for v4.9 Simon Horman
` (28 preceding siblings ...)
2016-09-08 7:43 ` [PATCH 29/30] arm64: dts: r8a7796: salvator-x: add serial console pins Simon Horman
@ 2016-09-08 7:43 ` Simon Horman
2016-09-14 15:43 ` [GIT PULL] Renesas ARM64 Based SoC DT Updates for v4.9 Arnd Bergmann
30 siblings, 0 replies; 32+ messages in thread
From: Simon Horman @ 2016-09-08 7:43 UTC (permalink / raw)
To: linux-renesas-soc
Cc: linux-arm-kernel, Magnus Damm, Takeshi Kihara, Simon Horman
From: Takeshi Kihara <takeshi.kihara.df@renesas.com>
Add GPIO device nodes to the DT of the r8a7796 SoC.
Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Tested-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
---
arch/arm64/boot/dts/renesas/r8a7796.dtsi | 112 +++++++++++++++++++++++++++++++
1 file changed, 112 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/r8a7796.dtsi b/arch/arm64/boot/dts/renesas/r8a7796.dtsi
index 91abc0732bdf..9217da983525 100644
--- a/arch/arm64/boot/dts/renesas/r8a7796.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a7796.dtsi
@@ -107,6 +107,118 @@
status = "disabled";
};
+ gpio0: gpio@e6050000 {
+ compatible = "renesas,gpio-r8a7796",
+ "renesas,gpio-rcar";
+ reg = <0 0xe6050000 0 0x50>;
+ interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ gpio-ranges = <&pfc 0 0 16>;
+ #interrupt-cells = <2>;
+ interrupt-controller;
+ clocks = <&cpg CPG_MOD 912>;
+ power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
+ };
+
+ gpio1: gpio@e6051000 {
+ compatible = "renesas,gpio-r8a7796",
+ "renesas,gpio-rcar";
+ reg = <0 0xe6051000 0 0x50>;
+ interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ gpio-ranges = <&pfc 0 32 29>;
+ #interrupt-cells = <2>;
+ interrupt-controller;
+ clocks = <&cpg CPG_MOD 911>;
+ power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
+ };
+
+ gpio2: gpio@e6052000 {
+ compatible = "renesas,gpio-r8a7796",
+ "renesas,gpio-rcar";
+ reg = <0 0xe6052000 0 0x50>;
+ interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ gpio-ranges = <&pfc 0 64 15>;
+ #interrupt-cells = <2>;
+ interrupt-controller;
+ clocks = <&cpg CPG_MOD 910>;
+ power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
+ };
+
+ gpio3: gpio@e6053000 {
+ compatible = "renesas,gpio-r8a7796",
+ "renesas,gpio-rcar";
+ reg = <0 0xe6053000 0 0x50>;
+ interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ gpio-ranges = <&pfc 0 96 16>;
+ #interrupt-cells = <2>;
+ interrupt-controller;
+ clocks = <&cpg CPG_MOD 909>;
+ power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
+ };
+
+ gpio4: gpio@e6054000 {
+ compatible = "renesas,gpio-r8a7796",
+ "renesas,gpio-rcar";
+ reg = <0 0xe6054000 0 0x50>;
+ interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ gpio-ranges = <&pfc 0 128 18>;
+ #interrupt-cells = <2>;
+ interrupt-controller;
+ clocks = <&cpg CPG_MOD 908>;
+ power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
+ };
+
+ gpio5: gpio@e6055000 {
+ compatible = "renesas,gpio-r8a7796",
+ "renesas,gpio-rcar";
+ reg = <0 0xe6055000 0 0x50>;
+ interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ gpio-ranges = <&pfc 0 160 26>;
+ #interrupt-cells = <2>;
+ interrupt-controller;
+ clocks = <&cpg CPG_MOD 907>;
+ power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
+ };
+
+ gpio6: gpio@e6055400 {
+ compatible = "renesas,gpio-r8a7796",
+ "renesas,gpio-rcar";
+ reg = <0 0xe6055400 0 0x50>;
+ interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ gpio-ranges = <&pfc 0 192 32>;
+ #interrupt-cells = <2>;
+ interrupt-controller;
+ clocks = <&cpg CPG_MOD 906>;
+ power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
+ };
+
+ gpio7: gpio@e6055800 {
+ compatible = "renesas,gpio-r8a7796",
+ "renesas,gpio-rcar";
+ reg = <0 0xe6055800 0 0x50>;
+ interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ gpio-ranges = <&pfc 0 224 4>;
+ #interrupt-cells = <2>;
+ interrupt-controller;
+ clocks = <&cpg CPG_MOD 905>;
+ power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
+ };
+
pfc: pin-controller@e6060000 {
compatible = "renesas,pfc-r8a7796";
reg = <0 0xe6060000 0 0x50c>;
--
2.7.0.rc3.207.g0ac5344
^ permalink raw reply related [flat|nested] 32+ messages in thread* Re: [GIT PULL] Renesas ARM64 Based SoC DT Updates for v4.9
2016-09-08 7:43 [GIT PULL] Renesas ARM64 Based SoC DT Updates for v4.9 Simon Horman
` (29 preceding siblings ...)
2016-09-08 7:43 ` [PATCH 30/30] arm64: dts: r8a7796: Add GPIO device nodes Simon Horman
@ 2016-09-14 15:43 ` Arnd Bergmann
30 siblings, 0 replies; 32+ messages in thread
From: Arnd Bergmann @ 2016-09-14 15:43 UTC (permalink / raw)
To: linux-arm-kernel
Cc: Simon Horman, arm, Kevin Hilman, Magnus Damm, linux-renesas-soc,
Olof Johansson
On Thursday, September 8, 2016 9:43:24 AM CEST Simon Horman wrote:
> Hi Olof, Hi Kevin, Hi Arnd,
>
> Please consider these Renesas ARM64 based SoC DT updates for v4.9.
>
> This pull request is based on the sh-pfc-for-v4.9-tag2 of
> Geert Uytterhoeven's renesas-driver's tree which is included in the
> devel and for-next branches of Linus Walleij's linux-pinctrl tree.
>
>
Pulled into next/late because of the dependency.
We'll send it during the merge window after the dependencies
are all merged upstream. Thanks,
Arnd
^ permalink raw reply [flat|nested] 32+ messages in thread