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From: Geert Uytterhoeven <geert+renesas@glider.be>
To: soc@lists.linux.dev,
	soc <soc@kernel.org>
Cc: Magnus Damm <magnus.damm@gmail.com>,
	linux-arm-kernel@lists.infradead.org,
	linux-renesas-soc@vger.kernel.org,
	Geert Uytterhoeven <geert+renesas@glider.be>
Subject: [GIT PULL 0/4] Renesas SoC updates for v6.18
Date: Fri, 29 Aug 2025 14:18:11 +0200
Message-ID: <cover.1756468041.git.geert+renesas@glider.be>
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	Hi SoC folks,

This is my first pull request for the inclusion of Renesas SoC updates
for v6.18.

It consists of 4 parts:

  [GIT PULL 1/4] Renesas ARM defconfig updates for v6.18

    - Enable support for the Renesas RZ/T2H serial driver and the
      RZ/V2H(P) RSPI driver in the ARM64 defconfig.

  [GIT PULL 2/4] Renesas ARM SoC updates for v6.18

    - Use the SZ_256K definition.

  [GIT PULL 3/4] Renesas driver updates for v6.18

    - Add syscon/regmap support to the RZ System Controller driver.

  [GIT PULL 4/4] Renesas DTS updates for v6.18

    - Add initial support for the RZ/T2H (R9A09G077) and RZ/N2H
      (R9A09G087) SoCs and their evaluation boards,
    - Add SPI support for the RZ/V2H SoC,
    - Add DMAC and I3C support for the RZ/G3E SoC,
    - Add I3C support for the RZ/G3S SoCs,
    - Miscellaneous fixes and improvements.

Note that PR 4/4 includes DT binding definition updates for the RZ/T2H
and RZ/N2H SoCs, which are shared by clock driver, pin control driver,
and DT source files.

Thanks for pulling!

Gr{oetje,eeting}s,

						Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
							    -- Linus Torvalds