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From: Christian Loehle <CLoehle@hyperstone.com>
To: Richard Weinberger <richard@nod.at>
Cc: Biju Das <biju.das.jz@bp.renesas.com>,
	linux-mmc <linux-mmc@vger.kernel.org>,
	linux-renesas-soc <linux-renesas-soc@vger.kernel.org>,
	wsa+renesas <wsa+renesas@sang-engineering.com>,
	ulf hansson <ulf.hansson@linaro.org>
Subject: RE: Poor write performance to boot area using rcar-gen3-sdhi
Date: Tue, 18 Apr 2023 08:36:01 +0000	[thread overview]
Message-ID: <f50de2461dae4931abf3f0216b836fd1@hyperstone.com> (raw)
In-Reply-To: <522326845.127346.1681805484949.JavaMail.zimbra@nod.at>

> Can it be that rcar-gen3-sdhi changes some timings after switching?
> Either in software or on hardware.

Neither should be aware of the notion of a boot or user area partition.
Anything below mmc/core isn't, if we exclude the boot operation which is read only, so not applicable to your problem.
So also a
while true; do dd if=/dev/zero of=/dev/mmcblkXboot0 bs=128K status=progress; done
gives you like ~50KB/s consistently?


-----Original Message-----
From: Richard Weinberger <richard@nod.at> 
Sent: Tuesday, April 18, 2023 10:11 AM
To: Christian Loehle <CLoehle@hyperstone.com>
Cc: Biju Das <biju.das.jz@bp.renesas.com>; linux-mmc <linux-mmc@vger.kernel.org>; linux-renesas-soc <linux-renesas-soc@vger.kernel.org>; wsa+renesas <wsa+renesas@sang-engineering.com>; ulf hansson <ulf.hansson@linaro.org>
Subject: Re: Poor write performance to boot area using rcar-gen3-sdhi

----- Ursprüngliche Mail -----
> Von: "Christian Loehle" <CLoehle@hyperstone.com> Your eMMC likely 
> treats the boot partitions differently than the user area, e.g.
> in regards to cache.
> Is this reproducible for more 4k writes? What about larger writes?

Yes. So far every write size I tried is slow.
Sometimes (1 out of 50) small writes are fast, that's most likely a caching effect of eMMC internals.

> The eMMC might not even have the mapping available after boot and 
> first has to internally switch to it, in contrast to at u-boot stage?

Wouldn't that explain only the first slow write?
I see poor write speed also on repeated runs.
 
> Anyway this is probably more a question to your eMMC manufacturer and 
> nothing the host is to be blamed, as you mentioned yourself, the time 
> is spent at CMD25.

The eMMC manufacturer says there is nothing special about the boot area and write speed should be equally fast.

Can it be that rcar-gen3-sdhi changes some timings after switching?
Either in software or on hardware.

Thanks,
//richard

Hyperstone GmbH | Reichenaustr. 39a  | 78467 Konstanz
Managing Director: Dr. Jan Peter Berns.
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  reply	other threads:[~2023-04-18  8:36 UTC|newest]

Thread overview: 13+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-04-17 20:08 Poor write performance to boot area using rcar-gen3-sdhi Richard Weinberger
2023-04-18  6:09 ` Biju Das
2023-04-18  6:16   ` Richard Weinberger
2023-04-18  7:48     ` Christian Loehle
2023-04-18  8:11       ` Richard Weinberger
2023-04-18  8:36         ` Christian Loehle [this message]
2023-04-18 11:58           ` Richard Weinberger
2023-04-20 15:18             ` Richard Weinberger
2023-04-21 16:23               ` Christian Loehle
2023-05-09 11:28                 ` Richard Weinberger
2023-05-11  9:46                   ` Christian Loehle
2023-05-11 10:35                     ` Richard Weinberger
2023-04-18  8:12       ` Biju Das

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